summaryrefslogtreecommitdiff
path: root/board
Commit message (Collapse)AuthorAgeLines
* MLK-9933 imx:mx6sxsabresd correct info for PFUZEPeng Fan2014-11-30-1/+6
| | | | | | | | We use PFUZE200 for SX SDB RevB board and PFUZE100 for SX SDB RevA board. Show correct msg according DeviceID, since PFUZE200 and PFUZE100 have different DeviceID. PFUZE200's id is 1, while PFUZE100's is 0. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-9890 imx:mx6sxsabresd add bmode sd3 supportPeng Fan2014-11-21-0/+1
| | | | | | | | Current uboot does not support bmode sd3. So add this to make 'bmode sd3' command in uboot can work fine. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 8f9c61e391687f9ef6e1f735040bd0d679320215)
* MLK-9819: ARM: mx6sx: clear WDOG3 Power Down Enable bit for i.mx6sxRobin Gong2014-11-11-0/+15
| | | | | | | | | | | Since we use WDOG_B reset now, we have to clear WDOG3 Power Down Enable bit to avoid system reboot during normal kernel boot. For mx6sxsabresd board, we have to make sure pad setting for WDOG_B ready before mux ready, otherwise also cause reboot. But that dependes on hardware design, only need on mx6sxsabresd board. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 26875f93ac7e84748fa63e5f0dd948d12e663e43)
* MLK-9343 QSPI signal pin pad setting - drive strength too strongAllen Xu2014-11-10-8/+8
| | | | | | | | Changed the QSPI PAD setting, the previous output drive strength is too strong. Signed-off-by: Allen Xu <b45815@freescale.com> (cherry picked from commit 9dfb4a5ee01740eadb751ca5c9edfbec6f5059e3)
* MLK-9733 imx: mx6sxsabreauto/mx6sxarm2: Fix nand clock glitchYe.Li2014-10-24-3/+18
| | | | | | | Since the qspi2_clk_root is the root clock of u_gpmi_bch_input_gpmi_io_clk, before switching the parent of qspi2_clk_root, we must gate off it. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9706 imx: mx6sx19x19arm2: Fix ENET card MAX7322 reset issueYe.Li2014-10-20-5/+5
| | | | | | | | | | | The MAX7322 will fail to work on 19x19 arm2 revB board. This failure is caused by the MAX7322 reset pin is not released when calling the setup_fec function. The MAX7322 reset pin is same as PHY reset pin. This patch fixes the issue by moving the PHY reset from setup_iomux_fec1 to setup_fec. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9705 imx: mx6sxsabreauto: add MAX7310 support to reset peripheralsYe.Li2014-10-20-0/+41
| | | | | | | | | The MAX7310 uses I2C3 bus. At system initialization, enable the driver to: 1. Reset CPU_PER_RST_B signal 2. Set the steering for ENET 3. Enable the LVDS display Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9676 imx: mx6sx 19x19arm2: Fix ethernet phy reset issueYe.Li2014-10-11-2/+2
| | | | | | | The PHY reset on 19x19 arm2 board is GPIO6_18, not GPIO4_22. This causes the ethernet phy failed to work. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9652 Android: imx6sxsabreauto: Add android features supportYe.Li2014-10-09-0/+108
| | | | | | Add android fastboot, recovery and booti support for mx6sx sabreauto board. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9668 imx: mx6sxsabreauto: Fix bmode valueYe.Li2014-10-09-3/+3
| | | | | | Set the correct bmode value for booting from SDA/SDB/QSPI1/NAND Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-9640 ARM: imx6sx: enable ldo-bypass on mx6sxsabresd boardRobin Gong2014-09-30-15/+108
| | | | | | enable ldo-bypass check on all mx6sxsabresd boards. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00333317 imx: mx6sxsabreauto: Add BSP support for AI boardYe.Li2014-09-26-0/+1200
| | | | | | | | | | | | | | | | Create mx6sx sabreauto BSP file and configurations. The devices below have been supported: 1. SD/MMC/eMMC on SDA/SDB (base board) sockets 2. USB OTG port and USB HOST port (base board) 3. NAND flash 4. QuadSPI flash on QSPI1 5. I2C 6. PMIC PFUZE100 7. Onboard ethernet chip on ENET2 8. Splash screen on LVDS Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00333299: Add support for i.MX6SX 14x14 lpddr2 arm2 boardNitin Garg2014-09-25-0/+301
| | | | | | | Add support for i.MX6SX 14x14 lpddr2 arm2 board, same as 17x17 arm2 except lpddr2 instead of ddr3. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00330792 imx: mx6: Merge anatop registers to CCM structureYe.Li2014-09-10-2/+2
| | | | | | | | | | THe anatop registers structure is duplicated with CCM structure at PLL fields. Since we are suggested not to use the name "anatop" any longer, merge the anatop registers to the CCM structure "mxc_ccm_reg" and use CCM to replace anatop. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00328278-1: Fix i.MX6DQ/DL arm2 LPDDR2 boards mem sizeNitin Garg2014-09-04-1/+6
| | | | | | | Couple of issues in commit 21a2eb5f. The RAM size is wrong and max number of DCD is 220. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00328278: Add support for i.MX6DQ/DL arm2 LPDDR2 boardsNitin Garg2014-08-28-5/+984
| | | | | | Add support for i.MX6DQ/DL arm2 LPDDR2 boards. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00326277-2 imx6: watchdog: use WDOG_B mode for wdog reset in ldo-bypass modeRobin Gong2014-08-26-5/+6
| | | | | | In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in ldo-bypass mode. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00326277-1: imx6: ldo_bypass: fix VDDARM voltage setting violate datasheetRobin Gong2014-08-26-9/+98
| | | | | | | | | Current only set VDDARM_IN@1.175V/VDDSOC_IN@1.175V before ldo bypass switch. So untile ldo bypass switch happened, these voltage setting is set in ldo-enable mode. But in datasheet, we need 1.15V + 125mV = 1.275V for VDDARM_IN. We need to downgrade cpufreq to 400Mhz and restore after ldo bypass mode switch. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00326448: mx6slevk: I2C: correct scl/sda defineRobin Gong2014-08-08-2/+2
| | | | | | | Correct the wrong setting, otherwise, i2c recovery code will use the wrong scl pin to recove, and will never recovery successfully. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00325634 iMX6DQ{DL}:SABRESD Fixed bmode booting failure for eMMCYe.Li2014-08-07-1/+1
| | | | | | | The BOOTCFG value used by bmode for SABRESD eMMC are actually for SD card. Fixed the value to correct one. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00326213 iMX6SX:19x19ARM2: Update LPDDR2 settingsYe.Li2014-08-07-34/+37
| | | | | | | | | | HWApps team updates iMX6SX 19x19 validation board LPDDR2 script. This script is JEDEC compliant. http://compass.freescale.net/livelink/livelink/open/232537085 Update the LPDDR2 settings in DCD and plugin. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320609 Use FUNC2 as Volume down key in bootloader recovery mode detectionguoyin.chen2014-07-01-2/+2
| | | | | | | | Align the keymap with Android rootfs as: FUNC1 -- > Volume + FUNC2 -- > Volume - Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00320125 iMX6: Change to use dynamical mmcrootYe.Li2014-06-30-3/+243
| | | | | | | | | | | | | | | | | | | | | | | | | The kernel changes to fix the mmcblk index with USDHC controllers as below: mmcblk0 ---> USDHC1 mmcblk1 ---> USDHC2 mmcblk2 ---> USDHC3 mmcblk3 ---> USDHC4 So in u-boot, the "mmcroot" must be updated together. When booting from SD/MMC device, change the "mmcroot" to dynamically set according to the boot USDHC controller. It is the same mechanism as "mmcdev" used for kernel image loading. Therefore, the uboot, kernel image, dtb and rootfs are required in same SD/MMC card. To disable the mmc dynamical detection, set the "mmcautodetect" to "no", then "mmcroot" and "mmcdev" will not be overwritten. When booting from other devices which needs to load kernel, dtb and rootfs from SD/MMC card, their "mmcdev" reset vaule is CONFIG_SYS_MMC_ENV_DEV and "mmcroot" reset value is CONFIG_MMCROOT. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320057 iMX6SX:SABRESD/19x19ARM2: Update DDR3 scriptsYe.Li2014-06-28-70/+136
| | | | | | | | Update latest DDR3 scirpts for imx6sx SabreSD and 19x19 DDR3 ARM2 board as provided by board team. (http://sw-git.freescale.net/cgi-bin/gitweb.cgi?p=ddr-scripts-rel.git) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319772 iMX6SX:ARM2: Add EIM-NOR support for 17x17 ARM2 boardYe.Li2014-06-25-0/+69
| | | | | | | | | | | | | | The NOR flash PC28F00AG18 has 512 of 256KB erase blocks which are locked after power on reset. Change the 17x17 ARM2 configurations to match the flash parameters, and enable the CONFIG_SYS_FLASH_PROTECTION to allow write to the flash. The EIM-NOR on 17x17 ARM2 board uses MUXed mode. This has less effort on board rework. When boot from EIM-NOR, set SW8, SW7, SW5 to all off. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319241: imx6: pfuze: set pmic mode to decrease power number in DSM modeRobin Gong2014-06-20-0/+213
| | | | | | | Currently, kernel common regulator framework can't support setting pmic mode by common DTS, so move the related code to u-boot firstly. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00319003 iMX6SX:HAB: Fixed build break when enabling secure bootYe.Li2014-06-18-4/+4
| | | | | | | | | | | | | | | When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform due to two problems. 1. The imximage tool in v2014 changes the command name of "SECURE_BOOT" to "CSF". Must update it in imximage.cfg scripts. 2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API definitions are not defined and cause compile errors. (HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW, HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-75 iMX6SX:SABRESD Support the reworked eMMC on SD4Ye.Li2014-06-17-0/+28
| | | | | | | | | | | | | | The eMMC chip on iMX6SX SABRESD board is DNP at default. HW rework is needed to weld it on the eMMC socket and disconnect SD card slot. The pins IOMUX of eMMC are different with SD card slot: 1. The eMMC uses 8 data pins, while SD card slot only uses 4 bits. 2. The CD pin used by SD card slot works as a data pin for eMMC. So adding a new u-boot target "mx6sxsabresd_emmc" for the eMMC support, rather than using the SD boot configuration. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-74 pfuze200: add clear print for pfuze200Ye.Li2014-06-17-3/+6
| | | | | | | | add clear print log to show pfuze200 or pfuze100 found on mx6qsabresd/ mx6slevk/mx6sx_19x19_arm2 boards. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-73 iMX6SX:SABRESD/ARM2 Add "bmode" command supportYe.Li2014-06-17-0/+47
| | | | | | | | | | | | | Enable the "CONFIG_CMD_BMODE" and add BSP support. "bmode" supports to reboot: SD4, QSPI2 (SABRESD) SD2, SD3, eMMC, QSPI2, NAND, SPINOR (17x17 ARM2) SD1, QSPI2, SPINOR, EIMNOR (19x19 ARM2) BTW: Board rework is needed on ARM2 for NAND, SPINOR or EIMNOR boot. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-72 iMX6SX:SABRESD/19x19ARM2 Add splash screen support in BSPYe.Li2014-06-17-2/+321
| | | | | | | | | | | | Enable the video drivers and MXS LCDIF driver to support the splash screen on MX6SX SDB and 19x19 ARM2. Add BSP codes for video parameters and LCDIF/LVDS initialization. "panel" env is used for selecting the display panel. Set "panel" env to "Hannstar-XGA" for LVDS display. Set "panel" env to "MCIMX28LCD" for parallel LCD display. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-69 iMX6:SABREAUTO Change android NAND partition layoutYe.Li2014-06-17-1/+1
| | | | | | | Update NAND memory layout for match with new mfg tool. Signed-off-by: Ke Qinghua <qinghua.ke@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-68 iMX6SX:SABRESD: Add Android features supportYe.Li2014-06-17-0/+121
| | | | | | | Add BSP codes to mx6sxsabresd to support android uboot features: fastboot, booti and recovery Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-66 iMX6SX:SABRESD Support M4 fast boot at early stageYe.Li2014-06-17-0/+4
| | | | | | | | | | | | | | | | T support M4 boot in 50 ms, kick start M4 at "board_early_init_f" stage where u-boot passes ARM and architecture initialization. Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature enablement. And a build config "mx6sxsabresd_m4fastup". Adjust the default M4 image address to 0x78000000 represented by "CONFIG_SYS_AUXCORE_BOOTDATA". When M4 fast boot is enabled, RDC should be enabled together and the QSPI driver must turn off, because M4 is running on QSPI flash in XIP. Setup this relationship by configurations. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-65 iMX6SX:SABRESD Add RDC settings to BSPYe.Li2014-06-17-0/+14
| | | | | | | | | | | According to the SRS, in the M4 CAN demo, the GPIO group1 will be shared between A9 and M4. At A9 side, the pins 0, 1, 2, 3 are used. M4 also uses one pin in its application. To synchronize the registers setttings of GPIO1, must enable RDC and RDC semaphore on the GPIO1. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-64 iMX6SX: Add MX6SX SABRE SD board supportYe.Li2014-06-17-0/+910
| | | | | | | | | | | | Add BSP codes for iMX6SX SABRE SD board to support SD/MMC, USB, QSPI2 NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Add board build targets of SABER SD for boot device: mx6sxsabresd --- SD/MMC mx6sxsabresd_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-63 iMX6SX: Add MX6SX 19x19 LPDDR2 ARM2 board supportYe.Li2014-06-17-0/+281
| | | | | | | | Add script "imximage_lpddr2.cfg" for DDR controller settings of LPDDR2. Modify "plugin.S" for LPDDR2. Add build target for 19x19 LPDDR2 ARM2 board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-62 iMX6SX: Add MX6SX 19x19 DDR3 ARM2 board supportYe.Li2014-06-17-0/+929
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 19x19 DDR3 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, WEIM NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Some features has conflicts, so can't be enabled at same time: WEIM-NOR <---> QSPI pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 19x19 DDR3 ARM2 for boot device: mx6sx_19x19_ddr3_arm2 --- SD/MMC/eMMC mx6sx_19x19_ddr3_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_19x19_ddr3_arm2_eimnor --- WEIM NOR flash mx6sx_19x19_ddr3_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-61 iMX6SX: Add MX6SX 17x17 ARM2 board supportYe.Li2014-06-17-0/+964
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 17x17 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, NAND Flash, Ethernet, I2C ,PMIC and M4 command boot (bootaux). Some features has conflicts, so can't be enabled at same time: QSPI <---> NAND pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 17x17 ARM2 for boot device: mx6sx_17x17_arm2 --- SD/MMC/eMMC mx6sx_17x17_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_17x17_arm2_nand --- NAND flash mx6sx_17x17_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-54 iMX6SX/SL: Modify SOC to support two ENETYe.Li2014-06-17-1/+1
| | | | | | | | | | | | | | | | | | | | | iMX6SX has different enet system clocks with iMX6SL, and has two ENET controllers. So update clocks and soc APIs accordingly to support this features. 1. Modify the clock API "enable_enet_clock" to enable enet system clock for enet controllers. 2. Enet RGMII TX clock source may come from external or internal PLL. By default, use the external phy CLK_25M output as TX clock source. When using internal PLL as source, the function enable_fec_anatop_clock must be called to enable clock for each enet controller. 3. Modify the MAC address function "imx_get_mac_from_fuse" to get either ENET MAC address. 4. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz reference clock. 5. Modify imx6slevk BSP to fit the new APIs. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-45 ARM:imx6:sabreauto Add USB HOST BSP supportYe.Li2014-06-17-11/+94
| | | | | | | | | | | | Sabreauto board has pin conflict (pin EIM_D18) between NOR flash and i2c3. To enable the USB host, the i2c3 must be used to operate the max7310 IO expander to output the VBUS power. As SPINOR is enabled at default, it is impossible to use USB host at same time. Thus, remove the SYS_USE_SPINOR from sabreauto configurations to disable SPINOR. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-41 i.mx6:sabresd/sabreauto/slevk Fix build break for android ↵Ye.Li2014-06-17-1/+9
| | | | | | | | | | support Add the android header file "mx6slevkandroid.h" for imx6slevk android support. Fix header file and pin name problems in BSP codes. Remove build warning in cmd_fastboot.c Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board supportYe.Li2014-06-17-0/+379
| | | | | | | | | | | | | | | | This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. The patch has been tested on the i.MX6Q and i.MX6DL arm2 board. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-38 MX6 Sabreauto:Add IPUv3 splash screen supportYe.Li2014-06-17-0/+201
| | | | | | | | | | | | | | | | This patch adds IPUv3 splash screen support for the MX6Q/SDL Sabreauto platforms. The default display is the Hannstar-XGA LVDS panel. Users may set the uboot variable 'panel' to be 'HDMI' to switch to use HDMI splash screen. To avoid duplicate configures on different sabre platforms, this patch moves the IPUv3 splash screen relevant configures to the head file 'mx6qsabre_common.h'. Also, this patch modifies the condition to build in EPDC splash screen feature in order to avoid the build break due to the migration of the IPUv3 splash screen relevant configures. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-37 MX6 SabreSD: Correct IPU DI pix fmt for LDBYe.Li2014-06-17-12/+3
| | | | | | | | | | | | | The DC mapping for LVDS666 is different from that for RGB666. Currently, we set IPU DI pixel format to be LVDS666 and set LDB data width to be 24bit. This happens to make the display work normally somehow. But, the two configurations are wrong and don't match with each other. This patch corrects the IPU DI output pixel format from LVDS666 to RGB666 and LDB data width from 24bit to 18bit. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-36 MX6 SabreSD: Disable HDMI detectYe.Li2014-06-17-8/+1
| | | | | | | | | | | | | | As the HDMI splash screen feature is not well supported, we should not set it to be the default display. In case, users leave the 'panel' uboot environment variable empty and connect the board with a HDMI monitor, the HDMI detect funtion will work and enable the HDMI splash screen. So, this patch disables HDMI detect function so that users may only explicitly set the 'panel' variable to be 'HDMI' to use HDMI splash screen. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-34 imx6:dlsabresd/slevk Fix build break when enables EPDCYe.Li2014-06-17-311/+316
| | | | | | | -Use the new pins' name for imx6dl. -Change the read/write to registers by using register structure. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-24 imx6:sabreauto/sabresd/arm2/evk Add the secureboot supportYe.Li2014-06-17-0/+39
| | | | | | | | | | | | | In order to support the secureboot, please turn on the CONFIG_SECURE_BOOT in "include/configs/mx6qsabre_common.h" ---- sabreauto or sabresd "include/configs/mx6slevk.h" ---- imx6slevk "include/configs/mx6qarm2.h" ---- arm2 By default, the CONFIG_SECURE_BOOT is disabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-23 imx6slevk: add the plugin mode supportYe.Li2014-06-17-1/+200
| | | | | | | | | This patch add the plugin mode support for imx6slevk board. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6slevk.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-22 imx6dl/solo:sabresd: add the plugin mode supportYe.Li2014-06-17-47/+14
| | | | | | | | | This patch add the plugin mode support for imx6dl and imx6solo sabresd. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6qsabre_common.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-11-22 04:41:07 +0000