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| * | twl4030: make twl4030_i2c_read_u8 prototype consistentNishanth Menon2013-05-10-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c read prototype is i2c_read(addr, reg, 1, &buf, 1) twl4030_i2c_read_u8(u8 addr, u8 *val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_read_u8(u8 addr, u8 reg, u8 *val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * | twl4030: make twl4030_i2c_write_u8 prototype consistentNishanth Menon2013-05-10-29/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c register write prototype is i2c_reg_write(u8 addr, u8 reg, u8 val) twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * | ti814x_evm: enable CPSW supportMatt Porter2013-05-10-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | Adds CPSW support to the TI814X EVM configured with an ET1011C PHY in GMII mode. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | am33xx: add pll and clock support for TI814x CPSWMatt Porter2013-05-10-0/+3
| | | | | | | | | | | | | | | | | | | | | Enables required PLLs and clocks for CPSW on TI814x. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-11-1966/+2720
|\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/mtd/nand/mxc_nand_spl.c include/configs/m28evk.h
| * | | imx: mx35pdk: Fix MUX2_CTR GPIOBenoît Thébaudeau2013-05-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MUX2_CTR is on GPIO1[5], not GPIO2[5], and it needs to be set high in order to connect the FEC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | mx23_olinuxino: Do not set voltage selection bit for SSP padsFabio Estevam2013-05-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | mx23 SSP pad registers do not contain voltage selection bit, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx23evk: Do not set voltage selection bit for SSP padsFabio Estevam2013-05-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | mx23 SSP pad registers do not contain voltage selection bit, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: m53evk: Convert to iomux-v3Benoît Thébaudeau2013-05-05-200/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, except for the folloing line that has been removed because the iomux mode was not set accordingly and the pad used for OTG OC is not this one: mxc_iomux_set_input(MX53_USBOH3_IPP_IND_OTG_OC_SELECT_INPUT, 1); Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx53smd: Convert to iomux-v3Benoît Thébaudeau2013-05-05-104/+48
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx53loco: Convert to iomux-v3Benoît Thébaudeau2013-05-05-223/+113
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx53evk: Convert to iomux-v3Benoît Thébaudeau2013-05-05-206/+83
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx53ard: Convert to iomux-v3Benoît Thébaudeau2013-05-05-186/+141
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: ima3-mx53: Convert to iomux-v3Benoît Thébaudeau2013-05-05-155/+73
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: vision2: Convert to iomux-v3Benoît Thébaudeau2013-05-05-362/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, except for older silicon revisions for which support is removed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx51_efikamx/sb: Convert to iomux-v3Benoît Thébaudeau2013-05-05-53/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, except for older silicon revisions for which support is removed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Matt Sealey <matt@genesi-usa.com>
| * | | imx: mx51evk: Convert to iomux-v3Benoît Thébaudeau2013-05-05-239/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, except for older silicon revisions for which support is removed. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: iomux-mx51: Fix MX51_PAD_EIM_CS2__GPIO2_27Benoît Thébaudeau2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: woodburn: Convert to iomux-v3Benoît Thébaudeau2013-05-05-32/+37
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx35pdk: Convert to iomux-v3Benoît Thébaudeau2013-05-05-99/+74
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx35pdk: Fix WDOG_RST iomux functionBenoît Thébaudeau2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The signal connected from this pin to the PMIC is WDOG_B, i.e. ALT0 mode, not ALT1 (which even corresponds to nothing). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: flea3: Convert to iomux-v3Benoît Thébaudeau2013-05-05-43/+48
| | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: zmx25: Convert to iomux-v3Benoît Thébaudeau2013-05-05-71/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, even if some pad control values could probably be simplified. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: tx25: Convert to iomux-v3Benoît Thébaudeau2013-05-05-39/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, even if some pad control values could probably be simplified. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx25pdk: Fix GPIO assignmentsBenoît Thébaudeau2013-05-05-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: mx25pdk: Convert to iomux-v3Benoît Thébaudeau2013-05-05-53/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no change of behavior, even if some pad control values could probably be simplified. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | arm: mx5: Add support for DENX M53EVKMarek Vasut2013-05-05-0/+556
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the DENX M53EVK board. Currently supported is: MMC (incl. booting) NAND (incl. booting) Ethernet, I2C, USB, SATA, RTC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de>
| * | | mx23_olinuxino: Fix DDR pin iomux settingsFabio Estevam2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change MUX_CONFIG_EMI to use the same drive strength as the bootlets code from Freescale, which results in much better stability. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx23evk: Fix DDR pin iomux settingsFabio Estevam2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Change MUX_CONFIG_EMI to use the same drive strength as the bootlets code from Freescale, which results in much better stability. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: iomux-v3: Include PKE and PUE to pad control pull definitionsBenoît Thébaudeau2013-04-28-99/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | imx: Homogenize and fix fuse register definitionsBenoît Thébaudeau2013-04-28-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx53ard: Move register masks into imx-regs.hFabio Estevam2013-04-25-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | imx-regs.h is more appropriate location for containing register masks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | wandboard: Add boot selection supportOtavio Salvador2013-04-25-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for 'bmode' command which let user to choose where to boot from; this allows U-Boot to load system from another storage without messing with jumpers. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | wandboard: Add support for Carrier Board MicroSD cardOtavio Salvador2013-04-25-7/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testing or upgrade proposes. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | wandboard: Add card detection for SOM MicroSD cardOtavio Salvador2013-04-25-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | mx6qsabresd: Return status when initializing MMCOtavio Salvador2013-04-25-6/+7
| | | | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | nitrogen6x: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard. Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers." Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: mx6q_4x_mt41j128.cfg: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup CCM_CCOSR register to provide a CKO1 clock frequency of 16.5 MHz. CKO1 drives sgtl5000 codec clock on mx6qsabrelite and doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. mx6q_4x_mt41j128.cfg is also used by mx6qsabresd, and it is safe to use it for this board as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: Add titanium board support (i.MX6 based)Stefan Roese2013-04-22-0/+560
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6sl: Add initial support for mx6slevk boardFabio Estevam2013-04-22-0/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6slevk board is a development board from Freescale based on the mx6 solo-lite processor. For details about mx6slevk, please refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX6SLEVK&parentCode=i.MX6SL&fpsp=1 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-11-27/+404
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| * | | | h2200: Add board reset supportŁukasz Dałek2013-05-05-0/+9
| | |_|/ | |/| | | | | | | | | | | | | | | | | | Use Samsung S3CA410X01 companion chip to reset PDA. Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-05-02-13/+285
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| | * | | powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PCXu Jiucheng2013-05-02-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | | powerpc/p1010rdb: Change flexcan compatible stringShengzhou Liu2013-05-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change flexcan compatible string from "fsl,flexcan-v1.0" to "fsl,p1010-flexcan" to match the device tree. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | | qoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020Zhicheng Fan2013-05-02-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resolve P1020 second USB controller multiplexing with eLBC - mandatory to mention USB2 in hwconfig string to select it over eLBC, otherwise USB2 node is removed - works only for SPI and SD boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | | powerpc/b4860qds: Add the tlb entries for SRIO interfacesLiu Gang2013-05-02-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the tlb entries based on the configuration of the SRIO interfaces. Every SRIO interface has 256M space: #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | | powerpc/p1022ds: Add support for NAND and NAND boot using SPLMatthew McClintock2013-05-02-6/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defines needed to access NAND, remove second flash bank that is actually connected to NAND. Add nand booting support for P1022DS with hardcoded DDR config using SPL framework from 2011 Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | | board/freescale/common/cds_pci_ft.c: Fix rotate wrong cells in interrupt-map ↵Jiang Bin2013-05-02-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | property For linux 3.x, the size of each item in interrupt-map property is 9 not 7. Don't use the static value and calculate the size with following cells: PCI #address-cells, PCI #interrupt-cells, PIC address, PIC #address-cells, PIC #interrupt-cells. Signed-off-by: Bin Jiang <bin.jiang@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2013-05-02-6/+20
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