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* ENGR00320609 Use FUNC2 as Volume down key in bootloader recovery mode detectionguoyin.chen2014-07-01-2/+2
| | | | | | | | Align the keymap with Android rootfs as: FUNC1 -- > Volume + FUNC2 -- > Volume - Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* ENGR00320125 iMX6: Change to use dynamical mmcrootYe.Li2014-06-30-3/+243
| | | | | | | | | | | | | | | | | | | | | | | | | The kernel changes to fix the mmcblk index with USDHC controllers as below: mmcblk0 ---> USDHC1 mmcblk1 ---> USDHC2 mmcblk2 ---> USDHC3 mmcblk3 ---> USDHC4 So in u-boot, the "mmcroot" must be updated together. When booting from SD/MMC device, change the "mmcroot" to dynamically set according to the boot USDHC controller. It is the same mechanism as "mmcdev" used for kernel image loading. Therefore, the uboot, kernel image, dtb and rootfs are required in same SD/MMC card. To disable the mmc dynamical detection, set the "mmcautodetect" to "no", then "mmcroot" and "mmcdev" will not be overwritten. When booting from other devices which needs to load kernel, dtb and rootfs from SD/MMC card, their "mmcdev" reset vaule is CONFIG_SYS_MMC_ENV_DEV and "mmcroot" reset value is CONFIG_MMCROOT. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00320057 iMX6SX:SABRESD/19x19ARM2: Update DDR3 scriptsYe.Li2014-06-28-70/+136
| | | | | | | | Update latest DDR3 scirpts for imx6sx SabreSD and 19x19 DDR3 ARM2 board as provided by board team. (http://sw-git.freescale.net/cgi-bin/gitweb.cgi?p=ddr-scripts-rel.git) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319772 iMX6SX:ARM2: Add EIM-NOR support for 17x17 ARM2 boardYe.Li2014-06-25-0/+69
| | | | | | | | | | | | | | The NOR flash PC28F00AG18 has 512 of 256KB erase blocks which are locked after power on reset. Change the 17x17 ARM2 configurations to match the flash parameters, and enable the CONFIG_SYS_FLASH_PROTECTION to allow write to the flash. The EIM-NOR on 17x17 ARM2 board uses MUXed mode. This has less effort on board rework. When boot from EIM-NOR, set SW8, SW7, SW5 to all off. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00319241: imx6: pfuze: set pmic mode to decrease power number in DSM modeRobin Gong2014-06-20-0/+213
| | | | | | | Currently, kernel common regulator framework can't support setting pmic mode by common DTS, so move the related code to u-boot firstly. Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00319003 iMX6SX:HAB: Fixed build break when enabling secure bootYe.Li2014-06-18-4/+4
| | | | | | | | | | | | | | | When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform due to two problems. 1. The imximage tool in v2014 changes the command name of "SECURE_BOOT" to "CSF". Must update it in imximage.cfg scripts. 2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API definitions are not defined and cause compile errors. (HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW, HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW) Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-75 iMX6SX:SABRESD Support the reworked eMMC on SD4Ye.Li2014-06-17-0/+28
| | | | | | | | | | | | | | The eMMC chip on iMX6SX SABRESD board is DNP at default. HW rework is needed to weld it on the eMMC socket and disconnect SD card slot. The pins IOMUX of eMMC are different with SD card slot: 1. The eMMC uses 8 data pins, while SD card slot only uses 4 bits. 2. The CD pin used by SD card slot works as a data pin for eMMC. So adding a new u-boot target "mx6sxsabresd_emmc" for the eMMC support, rather than using the SD boot configuration. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-74 pfuze200: add clear print for pfuze200Ye.Li2014-06-17-3/+6
| | | | | | | | add clear print log to show pfuze200 or pfuze100 found on mx6qsabresd/ mx6slevk/mx6sx_19x19_arm2 boards. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-73 iMX6SX:SABRESD/ARM2 Add "bmode" command supportYe.Li2014-06-17-0/+47
| | | | | | | | | | | | | Enable the "CONFIG_CMD_BMODE" and add BSP support. "bmode" supports to reboot: SD4, QSPI2 (SABRESD) SD2, SD3, eMMC, QSPI2, NAND, SPINOR (17x17 ARM2) SD1, QSPI2, SPINOR, EIMNOR (19x19 ARM2) BTW: Board rework is needed on ARM2 for NAND, SPINOR or EIMNOR boot. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-72 iMX6SX:SABRESD/19x19ARM2 Add splash screen support in BSPYe.Li2014-06-17-2/+321
| | | | | | | | | | | | Enable the video drivers and MXS LCDIF driver to support the splash screen on MX6SX SDB and 19x19 ARM2. Add BSP codes for video parameters and LCDIF/LVDS initialization. "panel" env is used for selecting the display panel. Set "panel" env to "Hannstar-XGA" for LVDS display. Set "panel" env to "MCIMX28LCD" for parallel LCD display. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-69 iMX6:SABREAUTO Change android NAND partition layoutYe.Li2014-06-17-1/+1
| | | | | | | Update NAND memory layout for match with new mfg tool. Signed-off-by: Ke Qinghua <qinghua.ke@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-68 iMX6SX:SABRESD: Add Android features supportYe.Li2014-06-17-0/+121
| | | | | | | Add BSP codes to mx6sxsabresd to support android uboot features: fastboot, booti and recovery Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-66 iMX6SX:SABRESD Support M4 fast boot at early stageYe.Li2014-06-17-0/+4
| | | | | | | | | | | | | | | | T support M4 boot in 50 ms, kick start M4 at "board_early_init_f" stage where u-boot passes ARM and architecture initialization. Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature enablement. And a build config "mx6sxsabresd_m4fastup". Adjust the default M4 image address to 0x78000000 represented by "CONFIG_SYS_AUXCORE_BOOTDATA". When M4 fast boot is enabled, RDC should be enabled together and the QSPI driver must turn off, because M4 is running on QSPI flash in XIP. Setup this relationship by configurations. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-65 iMX6SX:SABRESD Add RDC settings to BSPYe.Li2014-06-17-0/+14
| | | | | | | | | | | According to the SRS, in the M4 CAN demo, the GPIO group1 will be shared between A9 and M4. At A9 side, the pins 0, 1, 2, 3 are used. M4 also uses one pin in its application. To synchronize the registers setttings of GPIO1, must enable RDC and RDC semaphore on the GPIO1. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-64 iMX6SX: Add MX6SX SABRE SD board supportYe.Li2014-06-17-0/+910
| | | | | | | | | | | | Add BSP codes for iMX6SX SABRE SD board to support SD/MMC, USB, QSPI2 NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Add board build targets of SABER SD for boot device: mx6sxsabresd --- SD/MMC mx6sxsabresd_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-63 iMX6SX: Add MX6SX 19x19 LPDDR2 ARM2 board supportYe.Li2014-06-17-0/+281
| | | | | | | | Add script "imximage_lpddr2.cfg" for DDR controller settings of LPDDR2. Modify "plugin.S" for LPDDR2. Add build target for 19x19 LPDDR2 ARM2 board. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-62 iMX6SX: Add MX6SX 19x19 DDR3 ARM2 board supportYe.Li2014-06-17-0/+929
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 19x19 DDR3 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, WEIM NOR Flash, Ethernet, I2C, PMIC and M4 command boot(bootaux). Some features has conflicts, so can't be enabled at same time: WEIM-NOR <---> QSPI pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 19x19 DDR3 ARM2 for boot device: mx6sx_19x19_ddr3_arm2 --- SD/MMC/eMMC mx6sx_19x19_ddr3_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_19x19_ddr3_arm2_eimnor --- WEIM NOR flash mx6sx_19x19_ddr3_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-61 iMX6SX: Add MX6SX 17x17 ARM2 board supportYe.Li2014-06-17-0/+964
| | | | | | | | | | | | | | | | | | | Add BSP codes for iMX6SX 17x17 ARM2 board to support SD/MMC, USB, QSPI2 NOR Flash, SPI NOR flash, NAND Flash, Ethernet, I2C ,PMIC and M4 command boot (bootaux). Some features has conflicts, so can't be enabled at same time: QSPI <---> NAND pin conflict QSPI <---> SPI-NOR u-boot driver conflict SPI-NOR <---> SD2 pin conflict Add board build targets of 17x17 ARM2 for boot device: mx6sx_17x17_arm2 --- SD/MMC/eMMC mx6sx_17x17_arm2_spinor --- SPINOR on ECSPI4 CS0 mx6sx_17x17_arm2_nand --- NAND flash mx6sx_17x17_arm2_qspi2 --- QuadSPI2 NOR flash Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-54 iMX6SX/SL: Modify SOC to support two ENETYe.Li2014-06-17-1/+1
| | | | | | | | | | | | | | | | | | | | | iMX6SX has different enet system clocks with iMX6SL, and has two ENET controllers. So update clocks and soc APIs accordingly to support this features. 1. Modify the clock API "enable_enet_clock" to enable enet system clock for enet controllers. 2. Enet RGMII TX clock source may come from external or internal PLL. By default, use the external phy CLK_25M output as TX clock source. When using internal PLL as source, the function enable_fec_anatop_clock must be called to enable clock for each enet controller. 3. Modify the MAC address function "imx_get_mac_from_fuse" to get either ENET MAC address. 4. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz reference clock. 5. Modify imx6slevk BSP to fit the new APIs. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-45 ARM:imx6:sabreauto Add USB HOST BSP supportYe.Li2014-06-17-11/+94
| | | | | | | | | | | | Sabreauto board has pin conflict (pin EIM_D18) between NOR flash and i2c3. To enable the USB host, the i2c3 must be used to operate the max7310 IO expander to output the VBUS power. As SPINOR is enabled at default, it is impossible to use USB host at same time. Thus, remove the SYS_USE_SPINOR from sabreauto configurations to disable SPINOR. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-41 i.mx6:sabresd/sabreauto/slevk Fix build break for android ↵Ye.Li2014-06-17-1/+9
| | | | | | | | | | support Add the android header file "mx6slevkandroid.h" for imx6slevk android support. Fix header file and pin name problems in BSP codes. Remove build warning in cmd_fastboot.c Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board supportYe.Li2014-06-17-0/+379
| | | | | | | | | | | | | | | | This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. The patch has been tested on the i.MX6Q and i.MX6DL arm2 board. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-38 MX6 Sabreauto:Add IPUv3 splash screen supportYe.Li2014-06-17-0/+201
| | | | | | | | | | | | | | | | This patch adds IPUv3 splash screen support for the MX6Q/SDL Sabreauto platforms. The default display is the Hannstar-XGA LVDS panel. Users may set the uboot variable 'panel' to be 'HDMI' to switch to use HDMI splash screen. To avoid duplicate configures on different sabre platforms, this patch moves the IPUv3 splash screen relevant configures to the head file 'mx6qsabre_common.h'. Also, this patch modifies the condition to build in EPDC splash screen feature in order to avoid the build break due to the migration of the IPUv3 splash screen relevant configures. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-37 MX6 SabreSD: Correct IPU DI pix fmt for LDBYe.Li2014-06-17-12/+3
| | | | | | | | | | | | | The DC mapping for LVDS666 is different from that for RGB666. Currently, we set IPU DI pixel format to be LVDS666 and set LDB data width to be 24bit. This happens to make the display work normally somehow. But, the two configurations are wrong and don't match with each other. This patch corrects the IPU DI output pixel format from LVDS666 to RGB666 and LDB data width from 24bit to 18bit. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-36 MX6 SabreSD: Disable HDMI detectYe.Li2014-06-17-8/+1
| | | | | | | | | | | | | | As the HDMI splash screen feature is not well supported, we should not set it to be the default display. In case, users leave the 'panel' uboot environment variable empty and connect the board with a HDMI monitor, the HDMI detect funtion will work and enable the HDMI splash screen. So, this patch disables HDMI detect function so that users may only explicitly set the 'panel' variable to be 'HDMI' to use HDMI splash screen. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-34 imx6:dlsabresd/slevk Fix build break when enables EPDCYe.Li2014-06-17-311/+316
| | | | | | | -Use the new pins' name for imx6dl. -Change the read/write to registers by using register structure. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-24 imx6:sabreauto/sabresd/arm2/evk Add the secureboot supportYe.Li2014-06-17-0/+39
| | | | | | | | | | | | | In order to support the secureboot, please turn on the CONFIG_SECURE_BOOT in "include/configs/mx6qsabre_common.h" ---- sabreauto or sabresd "include/configs/mx6slevk.h" ---- imx6slevk "include/configs/mx6qarm2.h" ---- arm2 By default, the CONFIG_SECURE_BOOT is disabled. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-23 imx6slevk: add the plugin mode supportYe.Li2014-06-17-1/+200
| | | | | | | | | This patch add the plugin mode support for imx6slevk board. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6slevk.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-22 imx6dl/solo:sabresd: add the plugin mode supportYe.Li2014-06-17-47/+14
| | | | | | | | | This patch add the plugin mode support for imx6dl and imx6solo sabresd. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6qsabre_common.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-21 imx6/sabreauto: add the plugin mode supportYe.Li2014-06-17-35/+502
| | | | | | | | | This patch add the plugin mode support for sabreauto board. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6qsabre_common.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-20 imx6/arm2: add the plugin mode supportYe.Li2014-06-17-3/+276
| | | | | | | | | This patch add the plugin mode support for arm2 board. In order to enable the plugin mode, please turn on the CONFIG_USE_PLUGIN in the include/configs/mx6qarm2.h Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-17 imx6q:sabresd/sabreauto: add SATA supportYe.Li2014-06-17-7/+21
| | | | | | | | This patch adds the SATA support for i.mx6qsabresd and i.mx6qsabreauto board Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-15 i.mx6:sabreauto: Remove duplicated I2C settingsYe.Li2014-06-17-2/+3
| | | | | | | | 1. The i2c2 bus is setup twice, remove the duplication. 2. The i2c settings are duplicated in mx6qsabreauto.h and mx6sabre_common.h, remove it from mx6qsabreauto.h Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-14 i.mx6:sabreauto/sabresd/slevk Remove unused CONFIG_SYS_I2C_SLAVEYe.Li2014-06-17-4/+3
| | | | | | | The CONFIG_SYS_I2C is enabled on i.mx6 boards. So the CONFIG_SYS_I2C_SLAVE becomes to unused. Remove this setting. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-13 i.mx6q:sabresd: update the DDR scriptYe.Li2014-06-17-123/+95
| | | | | | | | | This patch update the DDR script to the ddr-scripts-rel.git based on the top of the following commit: 7cd1c3b Removed the duplicate script files Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-10 i.mx6:sabreauto: Add the GPMI nand supportYe.Li2014-06-17-3/+69
| | | | | | | | | | | Add the GPMI nand support to the iMX6 sabreauto: --Enable the GPMI NAND at default. --Enable the clocks --Set the default environment for nand boot Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-9 i.mx6q/dl/solo:sabreauto: Add the WEIM-NOR supportYe.Li2014-06-17-9/+119
| | | | | | | Add the WEIM-NOR support Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-7 i.mx6q/dl/solo: sabresd/sabreauto: Add the SPI-NOR supportYe.Li2014-06-17-16/+50
| | | | | | | | | | This patch adds the SPI-NOR support for the i.mx6q/dl/solo:sabresd/auto board: - Support the SPI-NOR function with sf command, - Support the enviroment from SPI-NOR when CONFIG_SYS_BOOT_SPINOR Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-6 i.mx6:sabreauto: Add the i.MX6solo sabreauto supportYe.Li2014-06-17-0/+122
| | | | | | | | | | | | | This patch is to add the i.MX6solo sabreauto support, The i.MX6solo sabreauto board configuration has the following difference with i.MX6dl sabreauto: - DDR bus width: 32bit - DDR capacity: 1024M Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-5 i.mx6:sabreauto: Add the i.MX6DL sabreauto board supportYe.Li2014-06-17-1/+147
| | | | | | | | | | | | | This patch is to add the i.MX6DL sabreauto board support. i.MX6DL sabreauto board share the same design with i.MX6Q sabreauto board except the SOC difference. The DDR script has been updated to the v0.2 version from ddr-scripts-rel.git, the commit based on is: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-3 iMX6q:SABREAUTO: Rename the imximage.cfg to mx6q.cfgYe.Li2014-06-17-1/+1
| | | | | | | Rename the imximage.cfg to mx6q.cfg. No function change at all. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-2 iMX6:SABRESD: Add the i.MX6solo SABRESD board supportYe.Li2014-06-17-0/+130
| | | | | | | | | | The i.MX6solo sabre-sd board configuration has the following difference with i.MX6dl sabre-sd: - DDR bus width: 32bit - DDR capacity: 512M Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315894-1 iMX6q/dl:SABREAUTO/SABRESD: Refactor configurations for more ↵Ye.Li2014-06-17-2/+156
| | | | | | | | | | | | | iMX6 boards 1. Make the DDR size configurable based on the boards.cfg 2. Make the FDT file configurable based on the boards.cfg 3. Add DDR and boot configuration script for iMX6dl. Change default boot from SD card. The DDR script has been updated to the v1.5 version from ddr-scripts-rel commit: bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts. Signed-off-by: Ye.Li <B37916@freescale.com>
* ENGR00315499-21 HDMI: splash screen function enhancementNitin Garg2014-06-13-10/+10
| | | | | | | | | | | | -Change HDMI video mode to VGA. -Add pixel clock fraction part setting in IPU driver, fix video mode timing issue. -Add overflow state clear workaround, fix kernel hang in HDMI driver issue. -Correct IPU clock to 264MHz. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access supportNitin Garg2014-06-13-0/+25
| | | | | | | | | | | Add BSP codes to support SPI NOR flash read, write and erase by using "sf" command. In addition, add a new configuration "mx6slevk_spinor" for building the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-16 I2C: add I2C support on Sabre- boardNitin Garg2014-06-13-1/+206
| | | | | | | | - add I2C support on Sabresd ,Sabreauto board. - add pfuze init code based on I2C transfer in Sabre* board file. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-15 ARM:imx6sl:evk Add USB HOST supportNitin Garg2014-06-13-0/+29
| | | | | | | | Enable the USB EHCI for the imx6slevk board. Add VBUS control pin settings and related BSP codes. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-14 ARM:imx6:sabresd/arm2 Add USB HOST BSP supportNitin Garg2014-06-13-2/+75
| | | | | | | | | Enable the USB EHCI on sabresd and arm2 boards to support USB mass storage device. Pins are configured in board_ehci_hcd_init for VBUS control. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-12: ARM: MSL: add i2c0 support for imx6sl evkNitin Garg2014-06-13-0/+101
| | | | | | | | - Add i2c0 support for imx6sl evk platform. - Read pmic device ID and revsion ID. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00315499-11 ARM:imx6 Change static environment SD/MMC storage to dynamicNitin Garg2014-06-13-12/+382
| | | | | | | | | | | | | | | | | | | imx6 boards (sabresd, sabreauto, arm2 and slevk) have multiple SD/MMC ports to boot. But current uboot hard code the SD/MMC port for environment variables storage. So if customer changes a port without modifying the configuration "CONFIG_SYS_MMC_ENV_DEV", error will issue at saving and loading environment. Implement a mechanism to detect SD/MMC port from SRC SMBR register, and override the default "mmc_get_env_devno". The "board_late_mmc_env_init" is used to set "mmcdev" when booting from SD/MMC port. Finally after booting from SD/MMC, the environment storage device and "mmcdev" are both set to current SD/MMC port. Customers don't need to re-build the image if booting from different SD/MMC port. This patch also adds SD1 and SD3 support to imx6slevk BSP, and adds support for sabreauto SD1 slot on base board. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
generated by cgit v1.1 at 2024-07-16 16:00:30 +0000