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* Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-08-16-233/+234
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| * mpc885ads: Don't define CONFIG_BZIP2.Scott Wood2007-08-16-0/+3
| | | | | | | | | | | | | | | | bzip2 requires a significant chunk of malloc space, and there isn't enough room on mpc885ads (with only 8MB RAM) for both bzip2's malloc area and a downloaded image at 0x400000. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * Merge with /home/wd/git/u-boot/custodian/u-boot-nand-flashWolfgang Denk2007-08-16-229/+144
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| | * Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-08-15-5/+6
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| | * \ Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-08-15-118117/+12356
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| | * | | Small coding style cleanupStefan Roese2007-07-09-2/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| | * | | Migrate esd 405EP boards to new NAND subsystemMatthias Fuchs2007-07-09-225/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate esd 405EP boards to new NAND subsystem -cleanup -use correct io accessors (in/out_be32()) Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| | * | | Migrate esd 405EP boards to new NAND subsystemMatthias Fuchs2007-07-09-0/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prepares the migration from the legacy NAND driver to U-Boot's new NAND subsystem for esd boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * | | | ppc7xx: Update CPCI750 boardStefan Roese2007-08-16-4/+87
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This small CPCI750 update extends the board specific command "show_config" to display the Marvell strapping registers and extends the PCI IDE controller. Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | PPC4xx:HCU4/5 cleanupNiklaus Giger2007-08-16-29/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Minor cleanups to confirm to the u-boot coding style. Some german expressions -> english. HCU5 enforces a unique IP adress for a given slot in the rack. Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
* | | | PPC4xx:HCU4/5 cleanup ecc/sdram initNiklaus Giger2007-08-16-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make ecc initialisation robust, as DDR2-ECC errors may be generated while zeroing the RAM. Return 16 bytes (a cacheline) less than the available memory, as the board and/or PPC440EPx might have problems accessing the last bytes. Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
* | | | ppc4xx: Remove #warning in esd auto_update.cStefan Roese2007-08-16-4/+0
| | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | ppc4xx: Update Sequoia/Rainier bootstrap commandStefan Roese2007-08-16-48/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by David Mitchell, here an update for the Sequoia/Rainier bootstrap command. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-08-16-5/+6
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| * | | Move the MPC8641HPCN board under board/freescale.Jon Loeliger2007-08-15-5/+6
| | |/ | |/| | | | | | | | | | | | | Minor path corrections needed to ensure buildability. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | PPC4xx:HCU4/5-Board fix compile warningNiklaus Giger2007-08-15-10/+18
|/ / | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
* | TI DaVinci - fix unsupported %hhx formatksi@koi8.net2007-08-14-3/+3
| | | | | | | | Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-08-14-1300/+6871
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| * \ Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-08-14-116366/+4535
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| * \ \ Merge with /home/stefan/git/u-boot/zeusStefan Roese2007-08-14-1/+2771
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| | * | | ppc4xx: Add initial Zeus (PPC405EP) board supportStefan Roese2007-08-14-1/+842
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| | * | | ppc4xx: Add support for AMCC 405EP Taihu boardJohn Otken2007-07-26-0/+1929
| | | | | | | | | | | | | | | | | | | | Signed-off-by: John Otken <john@softadvances.com>
| * | | | Coding style cleanupStefan Roese2007-08-10-140/+147
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Add PPC4xx-HCU4 and HCU5 boards: HCU5 filesNiklaus Giger2007-08-10-0/+906
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | | | Add PPC4xx-HCU4 and HCU5 boards: HCU4 filesNiklaus Giger2007-08-10-0/+393
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | | | Add PPC4xx-HCU4 and HCU5 boards: common filesNiklaus Giger2007-08-10-0/+570
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | | | Add PPC4xx-HCU4 and HCU5 boards: make relatedNiklaus Giger2007-08-10-0/+442
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | | | Add PPC4xx-HCU4 and HCU5 boards: READMEsNiklaus Giger2007-08-10-0/+233
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | | | ppc4xx: Update AMCC Bamboo 440EP supportEugene OBrien2007-07-31-104/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed storage type of cfg_simulate_spd_eeprom to const Changed storage type of gpio_tab to stack storage (Cannot access global data declarations in .bss until afer code relocation) Improved SDRAM tests to catch problems where data is not uniquely addressable (e.g. incorrectly programmed SDRAM row or columns) Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules Fixed AM29LV320DT (OpCode Flash) sector map Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Update 440EPx lwmon5 board supportStefan Roese2007-07-31-24/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | new FPGA image for PLU405 boardMatthias Fuchs2007-07-28-1160/+1179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | new FPGA image for PLU405 board with improved CompactFlash timing Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * | | | ppc4xx: lwmon5: Update Lime initializationAnatolij Gustschin2007-07-26-2/+60
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change Lime SDRAM initialization to now support 100MHz and 133MHz (if enabled). Also the framebuffer is initialized to display a blue rectangle with a white border. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | ppc4xx: lwmon5: Support for 128 MByte NOR FLASH addedStefan Roese2007-07-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)Stefan Roese2007-07-24-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by Hakan Eryigit, here an updated setup for the lwmon5 interrupt controller. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | POST: Add ECC POST for the lwmon5 boardPavel Kolesnikov2007-07-20-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ECC Post test for the Lwmon5 board based on PPC440EPx to U-Boot. Signed-off-by: Pavel Kolesnikov <concord@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
| * | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-07-16-12/+1155
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| * | | | ppc4xx: Code cleanupStefan Roese2007-07-16-1/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setupStefan Roese2007-07-16-0/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.cStefan Roese2007-07-16-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Coding style cleanup. Update CHANGELOG.Wolfgang Denk2007-08-14-6/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | Update Makefiles for merged and split at45.c.Peter Pearse2007-08-14-2/+2
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* | | | | Delete the merged files.Peter Pearse2007-08-14-1242/+0
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* | | | | Add the files.Peter Pearse2007-08-14-0/+119
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* | | | | Add MACH_TYPE records for several AT91 boards.Peter Pearse2007-08-14-1/+1
| |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge to two at45.c files into a common file, split to at45.c and spi.c Fix spelling error in DM9161 PHY Support. Initialize at91rm9200 board (and set LED). Add PIO control for at91rm9200dk LEDs and Mux. Change dataflash partition boundaries to be compatible with Linux 2.6. Signed-off-by: Peter Pearse <peter.pearse@arm.com> Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
* | | | 85xxCDS: Add make targets for legacy systems.Randy Vinson2007-08-14-19/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
* | | | 85xxCDS: Enable the VIA PCI-to-ISA bridge.Andy Fleming2007-08-14-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Author: Randy Vinson <rvinson@linuxbox.(none)> Enable the PCI-to-ISA bridge in the VIA Southbridge located on the Arcadia main board. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: York Sun <yorksun@freescale.com>
* | | | Add support for UEC to 8568Andy Fleming2007-08-14-1/+68
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | Add PCI support for MPC8568MDS boardHaiying Wang2007-08-14-34/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is against u-boot-mpc85xx.git of www.denx.com Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
* | | | Fix minor 85xx warningsAndy Fleming2007-08-14-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some patches had inserted warnings into the build: * mpc8560ads declared data without using it * cpu_init declared ecm and immap without using it in all CONFIGs * MPC8548CDS.h had its default filenames changed so that they contained "\m" in the paths. Made the defaults not Windows-specific (or anything-specific) Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | 8548cds PCIE support.Ed Swarthout2007-08-14-115/+291
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-03 22:03:03 +0000