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* Initial mpc8610hpcd board files.Jon Loeliger2007-10-17-0/+871
| | | | | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* ppc4xx: Fix bug in I2C bootstrap values for Sequoia/RainierStefan Roese2007-10-15-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C bootstrap values that can be setup via the "bootstrap" command, were setup incorrect regarding the generation of the internal sync PCI clock. The values for PLB clock == 133MHz were slighly incorrect and the values for PLB clock == 166MHz were totally incorrect. This could lead to a hangup upon booting while PCI configuration scan. This patch fixes this issue and configures valid PCI divisor values for the sync PCI clock, with respect to the provided external async PCI frequency. Here the values of the formula in the chapter 14.2 "PCI clocking" from the 440EPx users manual: AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz 33MHz async PCI frequency: PLB = 133: => 32 <= 44.3 <= 65 (div = 3) PLB = 166: => 32 <= 55.3 <= 65 (div = 3) 66MHz async PCI frequency: PLB = 133: => 65 <= 66.5 <= 132 (div = 2) PLB = 166: => 65 <= 83 <= 132 (div = 2) Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & YosemiteStefan Roese2007-10-15-5/+9
| | | | | | | | | | | The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>
* Fix warning differ in signedness in board/mpl/vcma9/vcma9.cWolfgang Denk2007-10-13-2/+2
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2007-10-13-4/+0
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| * AVR32: Initialize bi_flash* in board_init_rHaavard Skinnemoen2007-10-06-4/+0
| | | | | | | | | | | | | | | | | | | | | | The ATSTK1000-specific flash driver intializes bi_flashstart, bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI driver, don't. Initialize these in board_init_r instead so that things will still be set up correctly when we switch to the CFI driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2007-10-13-1/+1
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| * \ Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-10-04-5/+12
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| * | Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-09-18-57/+46
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| * \ \ Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-09-11-3/+6
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| * \ \ \ Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-09-10-21/+46
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| * \ \ \ \ Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-09-07-27/+921
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| * | | | | | Changed API name to coloured_led.hPeter Pearse2007-09-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed code using deprecated ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code
| * | | | | | Add coloured led interface for ARM boards.Peter Pearse2007-09-04-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered.
| * | | | | | Move include/led.h to board/at91rm9200dkPeter Pearse2007-09-04-0/+45
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* | | | | | | CM5200: Fix missing null-termination in hostname manipulation codeBartlomiej Sieka2007-10-05-0/+1
| |_|_|_|_|/ |/| | | | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
* | | | | | ppc4xx: Coding style cleanupStefan Roese2007-10-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Program EPLD to force full duplex mode for PHY.Grzegorz Bernacki2007-10-02-5/+12
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | EPLD forces modes of PHY operation. By default full duplex is turned off. This fix turns it on. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | | | TQM8xx[LM]: Fix broken environment alignment.Wolfgang Denk2007-09-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent toolchains, the environment sectors were no longer aligned to sector boundaries. The reason was a combination of two bugs: 1) common/environment.c assumed that CONFIG_TQM8xxL would be defined for all TQM8xxL and TQM8xxM boards. But "include/common.h", where this gets defined, is not included here (and cannot be included without causing lots of problems). Added a new #define CFG_USE_PPCENV for all boards which really want to put the environment is a ".ppcenv" section. 2) The linker scripts just include environment.o, silently assuming that the objects in that file are really in the order in which they are coded in the C file, i. e. "environment" first, then "redundand_environment", and "env_size" last. However, current toolchains (GCC-4.x) reorder the objects, causing the environment data not to start on a flash sector boundary: Instead of: we got: 40008000 T environment 40008000 T env_size 4000c000 T redundand_environment 40008004 T redundand_environment 40010000 T env_size 4000c004 T environment Note: this patch fixes just the first part, and cures the alignment problem by making sure that "env_size" gets placed correctly. However, we still have a potential issue because primary and redundant environment sectors are actually swapped, i. e. we have now: 40008000 T redundand_environment 4000c000 T environment 40010000 T env_size This shall be fixed in the next version. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | ColdFire: fix build error becasue of bad type of mii_init()Liew Tsi Chung-r5aahp2007-09-15-6/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
* | | | | ColdFire: Fix build error caused by pixis.cLiew Tsi Chung-r5aahp2007-09-15-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved the #include <asm/cache.h> inside the #ifdef CONFIG_FSL_PIXIS. Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
* | | | | Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as globalWolfgang Denk2007-09-15-35/+27
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | Make DECLARE_GLOBAL_DATA_PTR global for DaVinciDirk Behme2007-09-15-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not function local. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
* | | | | cm5200: Fix a typo introduced by afaac86fe2948ac84cd9a12bbed883b3c683e7d9Bartlomiej Sieka2007-09-13-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Marian Balakowicz <m8@semihalf.com>
* | | | | Fix memory corruption problem on STX GP3 SSA Board.Wolfgang Denk2007-09-12-1/+4
| |_|_|/ |/| | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | [GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot toGrzegorz Bernacki2007-09-11-3/+6
| |_|/ |/| | | | | | | | | | | | | | scan on second pci bus. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | Merge with /home/raj/git/u-boot#440SPe_PCIe_fixesWolfgang Denk2007-09-08-20/+46
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| * | | [PPC440SPe] PCIe environment settings for Katmai and YuccaGrzegorz Bernacki2007-09-07-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - 'pciconfighost' is set by default in order to be able to scan bridges behind the primary host/PCIe - 'pciscandelay' env variable is recognized to allow for user-controlled delay before the PCIe bus enumeration; some peripheral devices require a significant delay before they can be scanned (e.g. LSI8408E); without the delay they are not detected Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
| * | | [PPC440SPe] Improve PCIe configuration space accessGrzegorz Bernacki2007-09-07-20/+22
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | Merge with /home/raj/git/u-boot#ads5121_fixesWolfgang Denk2007-09-08-1/+0
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| * | [MPC512x] Correct fixup relocationRafal Jaworowski2007-09-07-1/+0
| | | | | | | | | | | | Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
* | | Update CHANGELOG, minor coding style cleanup.Wolfgang Denk2007-09-07-2/+0
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* | | PXA270: Added support for TrizepsIV board.stefano babic2007-09-07-0/+875
| | | | | | | | | | | | | | | | | | This patch add support for the Trizeps IV module (520Mhz). Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-09-07-5/+35
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| * | Fix ULI RTC support on MPC8544 DSKumar Gala2007-09-04-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC on the M1575 ULI chipset requires a dummy read before we are able to talk to the RTC. We accomplish this by adding a second memory region to the PHB the ULI is on and read from it. The second region is added to maintain compatiabilty with Linux's view of the PCI memory map. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ft_board_setup update 85xx/86xx of pci/pcie bus-range property.Ed Swarthout2007-09-04-4/+28
| |/ | | | | | | | | | | pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc5xxxWolfgang Denk2007-09-07-22/+10
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| * | Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDTGrant Likely2007-09-06-22/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200 Tested on: lite5200b Note: the fixup functions have not been moved to a common place. This patch is targeted for immediate merging as in solves a build issue, but the final name/location of the fixups is still subject to debate. I propose to merge this now, and move the fixups in the next merge window to be usable by all targets. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-09-02-555/+101
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| * 8548cds fixesEd Swarthout2007-08-29-3/+11
| | | | | | | | | | | | | | | | | | | | Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the correct consoledev needed for linux boot. Standardize on fdt{file,addr} var to hold dtb file name. Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
| * Remove the bios emulator binary files from MAI boardJason Jin2007-08-29-0/+0
| | | | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
| * support board vendor-common makefilesKim Phillips2007-08-29-15/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if a board/$(VENDOR)/common/Makefile exists, build it. also add the first such case, board/freescale/common/Makefile, to handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as dictated by board configuration. thusly get rid of alternate build dir errors such as: FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory by putting the common/ mkdir command in its proper place (the common Makefile). Common bits from existing individual board Makefiles have been removed. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Fix compilation error for omap2420h4_config.Dirk Behme2007-08-29-537/+0
| | | | | | | | | | | | | | omap2420h4 switched to cfi, so remove old (already disabled) flash.c and flash_probe() calls in env_flash.c. Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
| * Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-08-29-10/+490
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| * | IDE: - make ide_inb () and ide_outb () "weak", so boards canHeiko Schocher2007-08-28-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | define there own I/O functions. (Needed for the pcs440ep board). - The default I/O Functions are again 8 Bit accesses. - Added CONFIG_CMD_IDE for the pcs440ep Board. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx SequoiaGary Jennejohn2007-08-31-0/+3
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is set to non-zero, because it doesn't support MRM (memory-read- multiple) correctly. We now added the possibility to configure this register in the board config file, so that the default value of 8 can be overridden. Here the details of this patch: o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow board-specific settings. As an example the sequoia board requires 0. Idea from Stefan Roese <sr@denx.de>. o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the PCI IO-space. Obtained from Stefan Roese <sr@denx.de>. o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set CFG_PCI_CACHE_LINE_SIZE to 0. Signed-off-by: Gary Jennejohn <garyj@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 boardStefan Roese2007-08-23-0/+27
| | | | | | | | | | | | | | | | | | | | | | This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5 board. Now the "eeprom" command can be used to read/write from/to this device. Additionally a new command was added "eepromwp" to en-/disable the write-protect of this 2nd EEPROM. The 1st EEPROM is not affected by this write-protect command. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/stefan/git/u-boot/u-boot-ppc4xxStefan Roese2007-08-21-118062/+16479
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| * Merge with /home/wd/git/u-boot/custodian/u-boot-coldfireWolfgang Denk2007-08-18-399/+6201
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| | * Coding style cleanupStefan Roese2007-08-18-3/+0
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
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