| Commit message (Collapse) | Author | Age | Lines |
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Add mx50 mfg firmware support
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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This is caused by fec_pwr_en pin is mis-used which lead
to FEC not power on. This commit fix this issue.
Signed-off-by:Jason Liu <r64343@freescale.com>
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1. Reconstructure fuse. Move fuse files to common directory.
2. Read mac from fuse in fec.
3. Remove scc and srk command from fuse command.
4. Change fuse to iim.
5. Add fuse for mx53.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Adjust VDDGP voltage for 800MHZ as 1.05v.
2. Correct VDDA comments
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add spi_get_cfg function due to the function has been made
platform specific and moved out of spi driver.
This also fix the build break for mx53 uboot
Signed-off-by:Jason Liu <r64343@freescale.com>
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MMC init failed when boot with upper SD slot
while succesful with lower slot.
This patch will fix it.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Accoring to board identification table, the ADC data
register value range between "0xB9E79F - 0xC00000"
indicates 21.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Removed low voltage (1.8V) from supported voltage ranges.
Changed SD2_CMD pad setting to enable SD2 r/w in uboot.
Loaded env from booted device instead of SD1 always.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Use ROM plug-in feature to init DDR and re-config PLL1 to
800Mhz due to ROM set it to 799Mhz. Plug-in has the following benifit
from ROM team comments,
1. DCD size limitation issue, plugin can be the size of OCRAM
free space region which is 72KB.
2. Safe environment to re-configure PLL1 (without impacting SDRAM)
as the plugin runs from OCRAM. This could get around the issue
of some boards running with ARM @ 192MHz due to the incorrect
GPIO configuration for Low Power Boot.
3. Ability to have one bootloader binary for both LPDDR1 & LPDDR2 platforms.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Fix the build break for MX51 BBG board
Signed-off-by: Jason Liu <r64343@freescale.com>
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Add initial support for MX50
-Support mddr200Mhz, lpddr2266Mhz ARM2 board,
-Support boot from SD/MMC,
-Support boot from SPI-NOR,
-Support FEC, UART,
-Support SD/MMC/SPI command within UBOOT
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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CSPI: make spi_get_cfg platform specific
move the spi_get_cfg out of the cspi/ecspi driver
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add MFG tool support for MX53 EVK
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Added dynamic check for which sd slot used for boot
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Add dwc_ahsata support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Original uboot did not support sd1 and can only save environment
into sd0 even actually you're booting from sd1.
This patch adds the capability of saving environment into sd1
when you're booting from sd1.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Pass EVK RevB board ID to kernel by system_rev[11:8]
2 -->RevB,
1--->ARM2,
0--->RevA,
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add mx25 splash screen support.
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Renato Frias <renato.frias@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add DDR3 CPU board support, DDR3 clock 400Mhz
Create one config file for it since the DDR3 init
script is much different wtih DDR2.
Signed-off-by:Jason Liu <r64343@freescale.com>
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Set DDR clock to 400Mhz on MX53-EVK with DDR2 1GByte RevB
Set DDR clock to 300Mhz on MX53-EVK with DDR2 2GByte RevA1
Remove the clock dump during boot, user can use clk command to
get the clock information. Using help clk to get the command help
Signed-off-by:Jason Liu <r64343@freescale.com>
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The CPU_ID0 analog voltage level is obtained by reading ADC
channel 12 of the LTC2495 and the CPU_ID1 analog voltage
level is obtained by reading ADC channel 13.
The ADC data register value read from the LTC2495 is a 24 bit value.
For example, an ADC value that reads between 0xB3CF3E and 0xB9E79E
indicates a 130k ohm resistor is populated on the daughtercard,
which corresponds to ID level 20
By using CPU_ID0, CPU_ID1 to identify the board for example:
CPU_ID0 = 21, CPU_ID1 = 15, MX53-EVK with DDR2 1GByte RevB
Signed-off-by:Jason Liu <r64343@freescale.com>
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Support clock operation functions.
Signed-off-by: Terry Lv <r65388@freescale.com>
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As customer usually mmc to save env data.
Change default env device to mmc for bbg.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Integrate linear PMIC.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Change stmp378x to mx23evk in u-boot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add mfg firmware support for imx25
Signed-off-by:Yan Wang<r65094@freescale.com>
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Both EVK and ARM2 board using the same machine id.
Currently, use system_rev to diff ARM2 board. DDR freq
for ARM2 has been set to 400M, but 300M on EVK.
Signed-off-by:Jason Liu <r64343@freescale.com>
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Build Mfg firmware for mx35 3stack
Signed-off-by: Wallace Wang <r59996@freescale.com>
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System can not find MMC/SD card in SD
slot 1 when booting from Uboot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Update DDR init script according to compass:
http://compass.freescale.net/go/216805297
FCP 7 KB 25-Mar-2010
setmem /32 0x53fa8570 = 0x00180000 ->
setmem /32 0x53fa8570 = 0x00200000
setmem /32 0x53fa8578 = 0x00180000 ->
setmem /32 0x53fa8578 = 0x00200000
Signed-off-by:Jason Liu <r64343@freescale.com>
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-Update eSDHC clock setting,
-Fix the GPT timer setting,
-Fix the boot option pars,
-Remove mdelay() function call to improve the performance
Signed-off-by:Jason Liu <r64343@freescale.com>
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-update DDR script for 300MHZ support, this script got from Yaniv
-increase VDDA to 1.25V
Signed-off-by:Jason Liu <r64343@freescale.com>
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Add mmu, l1cache, l2cache support for mx53.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add uboot support for MX53
Signed-off-by:Jason Liu <r64343@freescale.com>
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MX28 U-BOOT enhancements.
Signed-off-by: Terry Lv <r65388@freescale.com>
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CR 00120191 is used to adjust IPU/VPU priority for memory
access in order to improve video performance. However this
change caused video playback and record unstable (See
CR 00120697, CR 00121478). It's decided to remove CR 00121504
change for the stability.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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MMU enable code is missed in mx51 and mx35 u-boot.
So add these codes.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Build Mfg firmware for mx51-bbg
Signed-off-by: Frank Li <frank.li@freescale.com>
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Enable Ethernet and MMC boot support for imx28-evk
Signed-off-by: Frank Li <frank.li@freescale.com>
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The new strategy will be:
bootargs_android_recovery and bootcmd_android_recovery
will be checked.
If they exists, their values will be used by bootargs_android
and bootcmd_android, or the default vaules will be used.
Signed-off-by: Terry Lv <r65388@freescale.com>
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New M4IF settings benefit to video performance improvement.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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The value read from mxc_i2c is not complete.
The last byte is lost.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The mac addr set to FEC is smc911x's.
So add a environment "fec_addr" to set fec address.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The IPU_HND_BYP bit is different in mx35 to1 and to2.
Change the value of this bit for mx35 to2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The iomux settings of mx51 bbg and mx35 3stack can't support eMMC card.
Thus, change the iomux settings.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add mx28 to u-boot and pass the compiling.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Update MX51 3-stack initialization codes to merge some
fixes from 200901 version
2. Update MX51 BBG code to add chip version check
Signed-off-by: Lily Zhang <r58066@freescale.com>
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The SD card in MMC Slot2 can not be detected. This is because
the board version of MX51 EVK doesn't keep synchronization
with kernel. So the card detect PIN is not configured well.
Here Bit 11-Bit 8 in system_rev indicates the board version.
The fix is to set Bit 11 -Bit8 as 1 for MX51 EVK board.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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1. Change the drive strength of DRAM PAD as high
2. Change ESDCFG setting
Signed-off-by: Lily Zhang <r58066@freescale.com>
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mmu support for mx51 3stack and mx51 bbg.
Signed-off-by: Terry Lv <r65388@freescale.com>
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