| Commit message (Collapse) | Author | Age | Lines |
| |
|
| |
|
|\ |
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Now the DDR2 frequency is also 2*PLB frequency when 166MHz PLB
is selected.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The board specific "bootstrap" command is now fixed and can
be used for the AMCC Katmai board to configure different
CPU/PLB/OPB frequencies.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This patch cleans up all the open issue of the preliminary
Acadia support.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | |
|
|\ \ \ \ |
|
| | | | | |
|
| | | | | |
|
| | | | | |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Reset support
BSP autoconfig support
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
|
| | | | | |
|
| |_|_|/
|/| | |
| | | |
| | | | |
Modifications to the existing code to support the new fdt command.
|
|\ \ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
(Dot outside sections problem).
This fix is in the spirit of 807d5d7319330e336ab34a5623c5e0d73b87d540.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
|\ \ \ \ \ |
|
| |\ \ \ \ \ |
|
| | | | | | | |
|
| |\ \ \ \ \ \ |
|
| | | | | | | | |
|
| | | | | | | | |
|
| | | | | | | | |
|
| | | | | | | | |
|
| | | | | | | | |
|
| | | | | | | |
| | | | | | | |
| | | | | | | |
| | | | | | | | |
support
|
| | | | | | | | |
|
|\ \ \ \ \ \ \ \
| |_|_|_|/ / / /
|/| | | | | / /
| | |_|_|_|/ /
| |/| | | | | |
|
| |\ \ \ \ \ \
| | | |_|_|_|/
| | |/| | | | |
|
| | | |_|_|/
| | |/| | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This patch adds support for the new AMCC Acadia eval board.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |_|_|_|/
|/| | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
for the SIUMCR and BCR Register.
Fix the calculation for the EEprom Size
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|\ \ \ \ \
| |/ / / / |
|
| | |_|/
| |/| |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Signed-off-by: Stefan Roese <sr@denx.de>
|
|/ / /
| | |
| | |
| | |
| | |
| | | |
(SC3 and Jupiter used to use 'addcon' instead).
Signed-off-by: Wolfgang Denk wd@denx.de
|
|\ \ \
| |_|/
|/| | |
|
| | |
| | |
| | |
| | | |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | | |
Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
|\ \ \ |
|
| | | |
| | | |
| | | |
| | | | |
(cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit)
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Disable G1TXCLK, G2TXCLK h/w buffers. This patch
fixes a networking timeout issue with MPC8360EA (Rev.2) PBs.
Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
it pass DDR/DDR2 compliance tests.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add support for the MPC8349E-mITX-GP, a stripped-down version of the
MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in
HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
never does anything. This patch deletes it.
Signed-off-by: Timur Tabi <timur@freescale.com>
|