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* microblaze: Add support for NET_MULTI apiMichal Simek2010-10-12-0/+13
| | | | | | Microblaze hasn't supported NET_MULTI support. Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Wolfgang Denk2010-10-11-51/+33
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| * x86: Use loops instead of memcpy/memset in board_init_fGraeme Russ2010-10-07-1/+2
| | | | | | | | | | | | | | Provides a small speed increase and prepares for fully relocatable image. Downside is the TEXT_BASE, bss, load address etc must ALL be aligned on a a 4-byte boundary which is not such a terrible restriction as everything is already 4-byte aligned anyway
| * x86: Rearrange linker scriptGraeme Russ2010-10-07-21/+18
| | | | | | | | Tidy up the linker script and discard some sections to save space
| * x86: Rename linker script symbolsGraeme Russ2010-10-07-12/+9
| | | | | | | | Create more generic names for the symbols exported from the linker script
| * x86: Remove usage of %ebp as a return pointerGraeme Russ2010-10-07-3/+2
| | | | | | | | Using %ebp as a return pointer prevents creating 'load anywhere' images
| * x86: Remove progress indication in low-level initGraeme Russ2010-10-07-12/+0
| | | | | | | | | | Progress indication is not relocation friendly so remove it in preperation for full relocatability support
| * x86: use gc sections to reduce image sizeGraeme Russ2010-10-07-5/+5
| | | | | | | | | | Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size.
| * x86: Use TEXT_BASE in linker scriptsGraeme Russ2010-10-07-4/+4
| | | | | | | | | | | | Use TEXT_BASE rather than a hard-coded base address on x86 linker scripts. This will allow any board to define its base link address without having to modify the linker script
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-10-11-28/+168
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| * | fsl: add support for NXID v1 EEPROM formatTimur Tabi2010-10-07-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale application note AN3638 describes an update to the NXID format, which stores MAC addresses and related data on an on-board EEPROM. The new version adds support for up to 23 MAC addresses, instead of just 8. Since the initial implementation of NXID had a "0" in the 'version' field, this new version is called "v1". Boards that are shipped with EEPROMs in the NXID v1 format should define CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-07-1/+27
| | | | | | | | | | | | | | | | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl: verify writes to the MAC address EEPROMTimur Tabi2010-10-07-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-07-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc8569mds: fix some ddr settingsHaiying Wang2010-10-07-3/+13
| | | | | | | | | | | | | | | | | | | | | Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc8569mds: fix consuming long time while relocating code.Haiying Wang2010-10-07-5/+36
| |/ | | | | | | | | | | | | | | | | | | | | | | The original code maps boot flash as non-cacheable region. When calling relocate_code in flash to copy u-boot from flash to ddr, every loop copy command is read from flash. The flash read speed will be the bottleneck, which consuming long time to do this operation. To resovle this, map the boot flash as write-through cache via tlb. And set tlb to remap the flash after code executing in ddr, to confirm flash erase operation properly done. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | board/mpl: Remove mpl-specific memory test commandPeter Tyser2010-10-06-598/+8
| | | | | | | | | | | | | | | | | | | | | | The mpl-specfic memory test is only documented for one board, doesn't compile cleanly, uses improper coding style, and overlaps functionality with U-Boot's common 'mtest' command, so lets get rid of it. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: d.peter@mpl.ch CC: d.mueller@elsoft.ch CC: wd@denx.de
* | CCM: remove code for yet another corpseWolfgang Denk2010-10-06-1487/+0
| | | | | | | | | | | | | | The CCM board has long reached EOL, and support for it is no longer relevant in current versions of U-Boot. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | PCU_E: remove code for yet another corpseWolfgang Denk2010-10-06-1597/+0
| | | | | | | | | | | | | | The PCU_E board has long reached EOL, and support for it is no longer relevant in current versions of U-Boot. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | pm9g45: fix compile warningWolfgang Denk2010-10-06-1/+0
| | | | | | | | | | | | | | | | | | | | Fix warning: pm9g45.c: In function 'pm9g45_macb_hw_init': pm9g45.c:99: warning: unused variable 'pio' Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Ilko Iliev <iliev@ronetix.at>
* | pm9263: fix compile warningWolfgang Denk2010-10-06-1/+0
|/ | | | | | | | | | Fix warning: pm9263.c: In function 'pm9263_macb_hw_init': pm9263.c:99: warning: unused variable 'pio' Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Ilko Iliev <iliev@ronetix.at>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-10-05-405/+897
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| * Blackfin: blackvme: new board portWojtek Skulski2010-10-02-0/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board includes: * ADSP-BF561 rev. 0.5 * 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG) * Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell) * SPI boot flash on PF2 (M25P64 8MB, or M25P128 16 MB) * FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB) * Spartan6-LX150 (memory-mapped; both PPIs also connected) * See http://www.skutek.com/ Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bct-brettl2: new board portPeter Meerwald2010-10-02-0/+430
| | | | | | | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-sdp: new board portMike Frysinger2010-10-02-0/+122
| | | | | | | | | | | | Support for the Blackfin System Development Platform (SDP) base module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: support a 3rd gpio cfi pinPeter Meerwald2010-10-02-1/+14
| | | | | | | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: move CONFIG_BFIN_CPU to board config.mkMike Frysinger2010-10-02-0/+50
| | | | | | | | | | | | | | | | | | The CONFIG_BFIN_CPU option is largely used in the build system, so move it out of the board config.h and into the board config.mk. It'd be nice to keep everything in the config.h, but the patch to extract that value early was rejected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ad7160-eval: convert from old style MMR macrosMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cm-bf548: video: convert from old style MMR macrosMike Frysinger2010-10-02-11/+12
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf548-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-10/+11
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-36/+40
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf537-stamp: post: update old MMR style macrosMike Frysinger2010-10-02-131/+75
| | | | | | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. For the GPIO MMR usage, convert to the new GPIO framework. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify gpio cfi implementationsMike Frysinger2010-10-02-216/+26
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-05-110/+490
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| * | ppc44x: config GPIOs for USB on canyonlands boardRupjyoti Sarmah2010-10-04-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | The GPIO 16 and 19 reconfiguration should be done once USB is initialized. So moved the reconfiguration to the USB init function. Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Small whitespace cleanup in canyonlands.cStefan Roese2010-10-04-10/+10
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Big lwmon5 board support rework/updateSascha Laue2010-10-04-90/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch brings the lwmon5 board support up-to-date. Here a summary of the changes: lwmon5 board port related: - GPIO's changed to control the LSB transmitter - Reset USB PHY's upon power-up - Enable CAN upon power-up - USB init error workaround (errata CHIP_6) - EBC: Enable burstmode and modify the timings for the GDC memory - EBC: Speed up NOR flash timings lwmon5 board POST related: - Add FPGA memory test - Add GDC memory test - DSP POST reworked - SYSMON POST: Fix handling of negative temperatures - Add output for sysmon1 POST - HW-watchdog min. time test reworked Additionally some coding-style changes were done. Signed-off-by: Sascha Laue <sascha.laue@liebherr.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | APM821xx: Add bluestone board supportTirumala Marri2010-10-04-0/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for bluestone board wth APM821XX processor based. This patch includes early board init, misc init, configure EBC, initializes UIC, MAKEALL, board.cfg and MAINTAINERS file. Signed-off-by: Tirumala R Marri <tmarri@apm.com Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk2010-10-05-131/+357
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| * | p1022ds: use weak CFI flash accessors when DIU is enabledTimur Tabi2010-09-25-7/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Freescale P1022, the DIU and the LBC share address pins, which means that when the DIU is active (e.g. the console is on the DVI display), NOR flash cannot be accessed. So we use the weak accessor function feature of the CFI flash code to temporarily switch the pin mux from DIU to LBC whenever we want to read or write flash. This has a significant performance penalty, but it's the only way to make it work. This change allows the 'saveenv' command to work when the video display is enabled. Erasing flash and writing to flash (with the 'cp' command) works, but reading from flash (with the 'md' and 'cp' commands) does not. Also, while flash is being written, the video display will be blank. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | p1022ds: add video supportTimur Tabi2010-09-25-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the DIU controller. If CONFIG_VIDEO is defined, then the console will appear on a DVI monitor instead of the serial port. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-25-131/+51
| | | | | | | | | | | | | | | | | | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | hmi1001, mucmc52, uc100, uc101: move boards to vendor directoryWolfgang Denk2010-10-04-0/+0
| |/ |/| | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Roderik Wildenburg <roderik.wildenburg@manroland.com>
* | Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-1490/+638
|\ \ | |/ | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-46/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc8308_p1m: support for MPC8308 P1M boardIlya Yanok2010-09-23-0/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308 P1M board with the following set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported Both I2C controllers are supported Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC8308RDB: various clean upsIlya Yanok2010-09-23-46/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up the Freescale MPC8308RDB Development board support. Things fixed: - Removed unused PCIE2 definitions from configuration - SICR{L,H} defines used for System I/O Configuration Registers values instead of hardcoding - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of writing to SCCR from the board code - sleep mode stuff removed as MPC8308 has no support for deep sleep and PMCCR1 register. board_early_init_f() removed. - MPC8308 has no ERRATA for DDR controller so workaround removed - 'assignment in if statement' issues solved - use LBLAWAR_* defines instead of hardcoding Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-23/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-38/+26
| | | | | | | | | | | | | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-11 14:18:14 +0000