summaryrefslogtreecommitdiff
path: root/board
Commit message (Collapse)AuthorAgeLines
* da850: Add README.da850Tom Rini2012-09-27-0/+68
| | | | | | | | | | | This file documents when to build for da850evm and when to build for da850_am18xxevm. It also documents how to write the u-boot.ais file to persistent storage (such as SPI), in some cases as well as how to write a recovery image. Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Prabhakar Lad <prabhakar.lad@ti.com>
* omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini2012-09-27-10/+0
| | | | | | | | Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2012-09-25-0/+20
|\
| * common lcd: simplify lcd_display_bitmapNikita Kiryanov2012-09-05-0/+20
| | | | | | | | | | | | | | | | | | | | | | Move highly platform dependant code into its own functions to reduce the number of #ifdefs in lcd_display_bitmap To avoid breaking the mcc200 board which does not #define CONFIG_CMD_BMP, this patch also implements bmp_display() for mcc200. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-1635/+161
|\ \
| * | powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPLScott Wood2012-08-23-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAW init is skipped in the SPL payload because it's assumed that the SPL has taken care of it -- so make sure the SPL loads all the LAWs as is done on other boards. This bug was introduced by: commit 4589728e214958a4e6e011a081a68d360c49d7a5 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Nov 11 08:14:53 2011 -0600 powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing LAW entries not needed during SPL phase. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | powerpc/85xx: remove support for the Freescale P3060Timur Tabi2012-08-23-1556/+0
| | | | | | | | | | | | | | | | | | | | | | | | The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/85xx: get rid of enum board_slots in P4080 MDIO driverTimur Tabi2012-08-23-40/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | enum board_slots contained six values, where SLOT1 == 1, SLOT2 == 2, and so on. This is pointless, so remove it. Also move the lane_to_slot[] array to the top of the file so that it can be used by other functions. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/85xx: introduce function serdes_device_from_fm_port()Timur Tabi2012-08-23-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to figure out which SerDes lane a given Fman port is connected to, we need a function that maps the fm_port namespace to the srds_prtcl namespace. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mpc85xx: use LCRR_DBYP define instead of raw constantPaul Gortmaker2012-08-23-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the raw value of 0x80000000 directly in the code can lead to "count the zeros" bugs like that fixed in commit 718e9d13b98 ("MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC") Change all existing raw values to use the symbolic value of LCRR_DBYP instead. Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit)Matthew McClintock2012-08-23-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There was an extra 0 in front of the value we were using to mask, remove it to improve the code. Also fix the value written to ddr_sdram_cfg to set the bus width properly to 16 bits Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/CoreNet: add tool to support pbl image build.Shaohui Xie2012-08-23-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides a tool to build boot Image for PBL(Pre boot loader) which is used on Freescale CoreNet SoCs, PBL can be used to load some instructions and/or data for pre-initialization. The default output image is u-boot.pbl, for more details please refer to doc/README.pblimage. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/corenet_ds: Slave module for boot from PCIELiu Gang2012-08-23-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Slave's ucode and ENV can be stored in master's memory space, then slave can fetch them through PCIE interface. For the corenet platform, ucode is for Fman. NOTE: Because the slave can not erase, write master's NOR flash by PCIE interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Put the slave's ucode and ENV into it's own memory space. 4. Normally boot from local NOR flash. 5. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the slave module, need to finish these processes: 1. Set the boot location to one PCIE interface by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID of one PCIE for the boot. 4. Set a specific TLB entry in order to fetch ucode and ENV from master. 5. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 6. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. In addition, the processes are very similar between boot from SRIO and boot from PCIE. Some configurations like the address spaces can be set to the same. So the module of boot from PCIE was added based on the existing module of boot from SRIO, and the following changes were needed: 1. Updated the README.srio-boot-corenet to add descriptions about boot from PCIE, and change the name to README.srio-pcie-boot-corenet. 2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to "xxxx_SRIO_PCIE_BOOT", and the image builded with "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and from PCIE. 3. Updated other macros and documents if needed to add information about boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macroLiu Gang2012-08-23-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compile the slave image for boot from SRIO, no longer need to specify which SRIO port it will boot from. The code will get this information from RCW and then finishes corresponding configurations. This has the following advantages: 1. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just rewrite the new RCW with selected port, then the code will get the port information by reading new RCW. 2. It will be easier to support other boot location options, for example, boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-21-206/+303
|\ \ \
| * \ \ Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-09-21-99/+55
| |\ \ \
| | * | | mx35pdk: README: Remove NAND referencesFabio Estevam2012-09-17-76/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting from NAND is currently not supported, so remove its references. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | MX35: mx35pdk: add support for MMCStefano Babic2012-09-10-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for SD card and change the default environment due to increased u-boot size. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | mx6qsabrelite:Use IMX_GPIO_NR MacroAshok Kumar Reddy2012-09-10-12/+12
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
| | * | | efikamx: refine USB supportMatt Sealey2012-09-04-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of the way USB pad settings are handled it doesn't make sense to be able to build the Efika MX board support without CONFIG_CMD_USB turned on. So, we change the build to always compile in USB support. We do not need to check for CONFIG_CMD_USB like we do with CONFIG_MXC_SPI since the USB subsystem will error out of the compile for us. Additionally, the following behaviors have changed; * Smartbook "preboot" should not set input and output to USB keyboard as there is no display support * board_eth_init is implemented such that it does not cause U-Boot to report an explicit failure ("CPU Net Initialization Failed"). Since Ethernet is implemented via USB (fixed on Smarttop, pluggable on Smartbook, and handled by "usb start") - the warning that is left ("No ethernet found") is perfectly reasonable at the point it is printed since the USB system hasn't been started and nothing has been probed yet. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
| | * | | mx28evk: Convert to mxs_adjust_memory_params()Fabio Estevam2012-09-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params missed to update mx28evk, which caused the board not to boot. Apply the conversion so that the board can boot again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| | * | | MX28: mx28evk: Align SSP clock speedOtavio Salvador2012-09-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the SSP clock speed with oscilator to achieve higher transfer stability. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
| * | | | Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
| * | | | ARM: tegra: fix Ventana standalone buildStephen Warren2012-09-07-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ventana always pulls in files from the Seaboard directory, so needs to mkdir $(obj)../seaboard unconditionally. This fixes: git clean -f -d -x ./MAKEALL ventana "MAKEALL -s tegra20" passes without this change, because Seaboard happens to be built before Ventana, and hence the directory has already been created. I believe the mkdir is only needed for out-of-tree builds, since the seaboard directory is part of the source tree. However, since we always build an SPL for Tegra now, which I believe is effectively an out-of-tree build, we will always need this at some time. The overhead of just uncondtionally executing the mkdir is minimal, and simplifies the Makefile, since we don't need to code up the exact minimal condition to execute the mkdir. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | ARM: tegra: remove redundant mkdirs from board MakefilesStephen Warren2012-09-07-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of harmony, seaboard, ventana, whistler directly build files from ../common/, so there's no need to mkdir the obj directory for such files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: Enable NAND on TECThierry Reding2012-09-07-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables NAND support on the Tamonten Evaluation Carrier and adds the corresponding device tree nodes. Furthermore, the U-Boot environment can now be stored in NAND. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: enable NAND on HarmonyStephen Warren2012-09-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | tegra: fdt: Add NAND definitions to fdtSimon Glass2012-09-07-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | Merge remote-tracking branch 'u-boot-ti/master' into mAlbert ARIBAUD2012-09-05-46/+157
| |\ \ \ \
| | * | | | OMAP3: mt_ventoux: added video supportStefano Babic2012-09-04-1/+84
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | OMAP3: mt_ventoux: disable the buzzer at start-upStefano Babic2012-09-04-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | OMAP3: mt_ventoux: read MAC address from EEPROMStefano Babic2012-09-04-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | OMAP3: mt_ventoux: Correct board pinmuxStefano Babic2012-09-04-41/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some issues (some pins were not set as GPIOs) Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | OMAP3: twister : get MAC address from EEPROMStefano Babic2012-09-04-0/+10
| | |/ / / | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | | Fixes the crippled console output on PortuxG20.Markus Hubig2012-09-04-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig <mhubig@imko.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | | eb_cpux9k2: fix chip selectJens Scharsig2012-09-03-3/+3
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | * fix chip select initialization for frame buffer, this will be increase frame buffer access speed Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | lsxl: support power switchMichael Walle2012-09-03-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch restores the Linkstation's original behaviour when powering off. Once the (soft) power switch is turned off, linux will reboot and the bootloader turns off HDD and USB power. Then it loops as long as the switch is in the off position, before continuing the boot process again. Additionally, this patch fixes the board function set_led(LED_OFF). Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
| * | | Cosmetic doc typo fixes to the kwbimage feature docsKarl O. Pinc2012-09-03-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Karl O. Pinc <kop@meme.com>
| * | | arm/km: remove unused codeHolger Brunck2012-09-03-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reasons we had an own implementaion of dram_init and dram_init_banksize. This is not needed anymore, use the standard kirkwood functions instead. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
| * | | km/ivm: fix string len check to support 7 char board namesValentin Longchamp2012-09-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fanless boards now have a 7-digit (XXXXX-F) board name. This triggers a border condition when reading this string in the IVM although this string is smaller than the currenly read string size, but only by 1 character. This patch corrects this by changing the size check condition for string length. It is the same change that was done in the platform for this same bug. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Bigler <stefan.bigler@keymile.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF54451 and MCF54455Alison Wang2012-09-20-56/+66
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF547x and MCF548xAlison Wang2012-09-20-32/+36
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF523xAlison Wang2012-09-20-19/+24
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF532x/MCF537x/MCF5301xAlison Wang2012-09-20-55/+61
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF52x2Alison Wang2012-09-20-65/+81
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | ColdFire: Clean up checkpatch warnings for MCF5227xAlison Wang2012-09-20-14/+16
| | | | | | | | | | | | | | | | Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxTom Rini2012-09-18-0/+58
|\ \ \ \
| * | | | mpc8308rdb: add support for eSDHC MMC controllerIra W. Snyder2012-09-18-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the onboard eSDHC MMC controller. The hardware on the MPC8308RDB has the following errata: - ESDHC111: manual asynchronous CMD12 is broken - DMA is broken (PIO works) Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> [added include fsl_esdhc header to prevent implicit declarations of fsl_esdhc_mmc_init() and fdt_fixup_esdhc()] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | mpc8308rdb: add support for Spansion SPI flash on header J8Ira W. Snyder2012-09-18-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI pins are routed to header J8 for testing SPI functionality. A Spansion flash has been wired up and tested on this header. This patch breaks support for the second TSEC interface, since the GPIO pin used as a chip select is pinmuxed with some of the TSEC pins. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | | ARM: Remove apollon boardMarek Vasut2012-09-18-1678/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is the only board that still sticks to OneNAND IPL. Remove this board, since we have SPL around for a while and OneNAND is well supported in the SPL framework. The board can be revived if necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-12-23 15:48:00 +0000