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* Minor coding style cleanup. Rebuild CHANGELOG file.Wolfgang Denk2007-07-04-20/+0
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* board/[k-z]*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).Jon Loeliger2007-07-04-77/+77
| | | | | | | | | | | | | | This is a compatibility step that allows both the older form and the new form to co-exist for a while until the older can be removed entirely. All transformations are of the form: Before: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) After: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT) Signed-off-by: Jon Loeliger <jdl@freescale.com>
* board/[Ma-i]*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).Jon Loeliger2007-07-04-75/+75
| | | | | | | | | | | | | | This is a compatibility step that allows both the older form and the new form to co-exist for a while until the older can be removed entirely. All transformations are of the form: Before: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) After: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT) Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk2007-07-03-5/+5
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| * Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-5/+5
| | | | | | | | | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-25-19/+29
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| * | Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk2007-06-22-19/+19
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| * | Extend POST support for PPC440Igor Lisitsin2007-06-22-0/+10
| | | | | | | | | | | | | | | | | | | | | Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
* | | ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-47/+34
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* | | ppc4xx: Maintenance patch for esd's CPCI405 derivatsMatthias Fuchs2007-06-25-21/+55
|/ / | | | | | | | | | | | | | | | | -add pci_pre_init() for pci interrupt fixup code -disable phy sleep mode via reset_phy() function -use correct io accessors -cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk2007-06-20-16/+16
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* | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-20-0/+11
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| * | TQM5200: Add Flat Device Tree support, update default env. accordingly.Bartlomiej Sieka2007-06-08-0/+11
| | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
* | | ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval boardStefan Roese2007-06-19-1/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a board command to configure the I2C bootstrap EEPROM values. Right now 533 and 667MHz are supported for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 533 nor ;to configure the board for 533MHz NOR booting => bootstrap 667 nand ;to configure the board for 667MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Fix problem with NAND booting on AMCC AcadiaStefan Roese2007-06-19-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Change board/amcc/acadia/cpr.c to pll.cStefan Roese2007-06-19-0/+0
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | [ppc4xx] Add initial lwmon5 board supportStefan Roese2007-06-15-0/+1892
|/ / | | | | | | | | | | | | This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
* | Coding Style cleanup; generate new CHANGELOG file.Wolfgang Denk2007-06-06-2/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-06-06-19/+9
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| * \ Merge branch 'mpc8641'Jon Loeliger2007-06-05-19/+5
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| | * | mpc8641 image size cleanupEd Swarthout2007-06-05-19/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | Merge branch 'mpc8641'Jon Loeliger2007-05-10-0/+4
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| | * | 8641hpcn: Fix Makefile after moving pixis to board/freescale.Ed Swarthout2007-05-08-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | | Merge with /home/wd/git/u-boot/custodian/u-boot-armWolfgang Denk2007-06-06-1683/+819
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| * | | | Reduce line lengths to 80 characters max.Peter Pearse2007-05-18-1/+2
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| * | | | Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-05-18-27/+488
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| * | | | Add the board directory for SMN42Peter Pearse2007-05-09-0/+796
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| * | | | Remove the deleted files for the SMN42 patchPeter Pearse2007-05-09-1430/+0
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| * | | | New board SMN42 branchPeter Pearse2007-05-09-253/+22
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* | | | Merge with /home/stefan/git/u-boot/acadia-nand-bootStefan Roese2007-06-06-4/+263
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| * | | | ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese2007-06-06-4/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-06-04-115/+260
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| * | | | ppc4xx: Add missing file for Bamboo NAND booting supportStefan Roese2007-06-01-0/+137
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese2007-06-01-109/+123
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| | * | | | ppc4xx: Update Sequoia NAND booting support with ECCStefan Roese2007-06-01-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| | * | | | ppc4xx: Prepare Bamboo port for NAND booting supportStefan Roese2007-06-01-109/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHzStefan Roese2007-06-01-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch undoes the patch by Jeff Mann with commit-id ada4697d. As suggested by AMCC it is not recommended to dynamically change the EBC speed after bootup. So we undo this change to be on the safe side. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/stx-gp3ssaWolfgang Denk2007-05-31-2/+1
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| * | | | | Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.Wolfgang Denk2007-05-31-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | Merge with /home/tur/git/u-boot#motionproWolfgang Denk2007-05-28-5/+52
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| * | | | | | Motion-PRO: Code cleanup, fix of a typo in OF_STDOUT_PATH.Bartlomiej Sieka2007-05-27-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | MPC5XXX, Motion-PRO: Fix PHY initialization problem.Bartlomiej Sieka2007-05-27-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which networking does not function. This commit switches PHY to TX mode by clearing the FX_SEL bit of Mode Control Register. It also reverses commit 008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add displaying of CPLD revision information during boot.Bartlomiej Sieka2007-05-27-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add LED support.Bartlomiej Sieka2007-05-27-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Signed-off-by: Marian Balakowicz <m8@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
* | | | | | | ppc4xx: Update AMCC Acadia support for board revision 1.1Stefan Roese2007-05-24-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Acadia (405EZ) support for the new 1.1 board revision. It also adds support for NAND FLASH via the 4xx NDFC. Please note that the jumper J7 must be in position 2-3 for this NAND support. Position 1-2 is for NAND booting only. NAND booting support will follow later. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-05-18-27/+488
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| * | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-05-16-2/+424
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| | * | | | | | Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | | | | mpc83xx: Add MPC8313ERDB support.Scott Wood2007-04-23-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-microblazeWolfgang Denk2007-05-16-25/+53
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