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* board/ti/am335x: add support for BeagleBone Greenrobertcnelson@gmail.com2015-11-18-3/+9
| | | | | | | | | | | | | | | | | | | | | SeeedStudio BeagleBone Green (BBG) is clone of the BeagleBone Black (BBB) minus the HDMI port and addition of two Grove connectors (i2c2 and usart2). This board can be identified by the 1A value after A335BNLT (BBB) in the at24 eeprom: 1A: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 1a 00 00 00 |.U3.A335BNLT....|] http://beagleboard.org/green http://www.seeedstudio.com/wiki/Beaglebone_green In Mainline Kernel as of: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=79a4e64c679d8a0b1037da174e4aea578c80c4e6 Patch tested on BeagleBone Black (rev C) and BeagleBone Green (production model) Signed-off-by: Robert Nelson <robertcnelson@gmail.com> CC: Tom Rini <trini@konsulko.com> CC: Jason Kridner <jkridner@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: beagle_x15: Rename to indicate support for TI am57xx evmsKipisz, Steven2015-11-18-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BeagleBoard X15 (http://beagleboard.org/x15) support in u-boot does actually support two different platform configuration offered by TI. In addition to BeagleBoard X15, it also supports the TMDXEVM5728 (or more commonly known as AM5728-evm). Information about the TI AM57xx EVM can be found here http://www.ti.com/tool/tmdxevm5728 The EVM configuration is 1-1 compatible with BeagleBoard X15 with the additional support for mPCIe, mSATA, LCD, touchscreen, Camera, push button and TI's wlink8 offering. Hence, we rename the beagle_x15 directory to am57xx to support TI EVMs that use the AM57xx processor. By doing this we have common code reuse. This sets the stage to have a common u-boot image solution for multiple TI EVMs such as that already done for am335x and am437x. This sets the stage for upcoming multiple TI EVMs that share the same code base. NOTE: Commit eae7ae185335 ("am437x: Add am57xx_evm_defconfig using CONFIG_DM") introduced DT support for beagle_x15 under am57xx_evm platform name. However, this ignored the potential confusion arising for users as a result. To prevent this, existing beagle_x15_defconfig is renamed as am57xx_evm_nodt_defconfig to denote that this is the "non device tree" configuration for the same platform. We still retain am57xx-beagle-x15.dts at this point, since we just require the common minimum dts. As a result of this change, users should expect changes in build procedures('make am57xx_evm_nodt_defconfig' instead of 'make beagle_x15_defconfig'). Hopefully, this would be a one-time change. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
* board/ti/am335x: beaglebone stop muxing i2c1_pin_muxrobertcnelson@gmail.com2015-11-12-2/+0
| | | | | | | | | | | On the BeagleBone these i2c1 pins are routed to the expanasion header, where they can be defined as either pr1_usart0_Xxd/pwm0/spi0/i2c1, dont assume i2c1 Fixes: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/313894/1387696 Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Matthijs van Duin <matthijsvanduin@gmail.com> CC: Tom Rini <trini@konsulko.com>
* board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+5
| | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: AM335x: mux: change mmc0 cd pinmux from mmc0_sdcd to gpioMugunthan V N2015-10-22-1/+1
| | | | | | | | | | Currently omap_hsmmc driver doesn't use sdcd pin to detect whether the card is present or not. Instead the same pin is used as GPIO to detect card presence. So change the pin mux mode from mmc0_sdcd to gpio0_6. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: k2g: Add config fileLokesh Vutla2015-10-22-0/+2
| | | | | | | | Add config file for k2g Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
* ARM: k2g: Enable SPI flashLokesh Vutla2015-10-22-0/+6
| | | | | | | GPIO1_9 controls SPI flash on k2g evm. So make GPIO1_9 as output pin, inorder to use SPI. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: k2g: add SD card and eMMC supportRoger Quadros2015-10-22-0/+16
| | | | | | | | Add MMC support for k2g Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: k2g: Add Ethernet SupportVitaly Andrianov2015-10-22-0/+24
| | | | | | | | Add Ethernet support for tftp support Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* driver: net: keystone_net: fix phy mode configurationMugunthan V N2015-10-22-0/+16
| | | | | | | | | | Phy mode is a board property and it can be different between multiple board and ports, so it should not be hardcoded in driver to one specific mode. So adding a field in eth_priv_t structure to pass phy mode to driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: k2g: Add pin mux dataVitaly Andrianov2015-10-22-0/+316
| | | | | | | Add pin mux data for k2g-evm Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: k2g: Add ddr3 infoVitaly Andrianov2015-10-22-4/+70
| | | | | | | Add ddr3 related info Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: k2g: Add clock informationVitaly Andrianov2015-10-22-0/+10
| | | | | | | | Add clock information for Galileo Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: k2g: Add pll dataVitaly Andrianov2015-10-22-0/+64
| | | | | | | Add pll data for k2g Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: k2g: Add kconfig supportLokesh Vutla2015-10-22-0/+13
| | | | | | Add Kconfig support Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Use dtb images by defaultLokesh Vutla2015-10-22-7/+7
| | | | | | | Now that OF_CONTROL is enabled on all keystone2 platforms, build the default images with DT. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* am335x_evm: prepare for eth driver model supportMugunthan V N2015-10-22-0/+7
| | | | | | | | Prepare board file so that ethernet registration are commented for DM conversion Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap-common: Common function to display die id, replacing omap3-specific versionPaul Kocialkowski2015-10-22-3/+3
| | | | | | | | | This introduces omap_die_id_display to display the full die id. There is no need to store it in an environment variable, that no boot script is using anyway. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap-common: Common serial and usbethaddr functions based on die idPaul Kocialkowski2015-10-22-17/+5
| | | | | | | | | Now that we have a common prototype to grab the omap die id, functions to figure out a serial number and usb ethernet address can use it directly. Those also get an omap_die_id prefix for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap5: omap_die_id supportPaul Kocialkowski2015-10-22-13/+6
| | | | | | | | This introduces omap5 support for omap_die_id, which matches the common omap_die_id definition. It replaces board-specific code to grab the die id bits. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap4: omap_die_id supportPaul Kocialkowski2015-10-22-6/+3
| | | | | | | | This introduces omap4 support for omap_die_id, which matches the common omap_die_id definition. It replaces board-specific code to grab the die id bits. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap3: omap_die_id supportPaul Kocialkowski2015-10-22-3/+3
| | | | | | | | This replaces the previous get_dieid definition with omap_die_id, that matches the common omap_die_id definition. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM Fix pandaboard es and a4 revision IDdbatzle@dcbcyber.com2015-10-22-2/+2
| | | | | | | board_name environment variable was not getting set correctly for Pandaboard A4 and ES Signed-off-by: David Batzle <dbatzle@dcbcyber.com> CC: Albert Aribaud <albert.u.boot@aribaud.net>; Tom Rini <trini@ti.com>; Peter Robinson <pbrobinson@gmail.com>
* ARM: k2e/l: Apply WA for selecting PA clock sourceLokesh Vutla2015-10-17-0/+4
| | | | | | | | | | | | | | | On keystone2 Lamarr and Edison platforms, the PA clocksource mux in PLL REG1, can be changed only after enabling its clock domain. So selecting the output of PASS PLL as input to PA only after enabling the clockdomain. This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>" and based on the previous work done by "Hao Zhang <hzhang@ti.com>" Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code") Reported-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ti816x: Switch to SYS_GENERIC_BOARDTom Rini2015-09-15-1/+1
| | | | | | | | Tested on my TI186x rev E. (PG2.0) and take over maintainership. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* ti814x_evm: Switch to SYS_GENERIC_BOARDTom Rini2015-09-15-1/+1
| | | | | | | | | | Take over maintainership as well. Not tested as PG2.0 (which I have) needs additional work over PG1.0 (which Matt has). Cc: Matt Porter <mporter@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* arm: Remove omap3_sdp3430 boardSimon Glass2015-09-11-647/+0
| | | | | | | This board has not been converted to generic board by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* board: ti: invoke clock API to enable and disable clocksKishon Vijay Abraham I2015-08-28-0/+10
| | | | | | | | invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: OMAP5: added USB initializtion codeKishon Vijay Abraham I2015-08-28-0/+75
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in omap5 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: beagle_x15: added USB initializtion codeKishon Vijay Abraham I2015-08-28-0/+111
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in beagle_x15 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: remove duplicate initialization of vbus_id_statusKishon Vijay Abraham I2015-08-28-4/+0
| | | | | | | | vbus_id_status is initialized in board_usb_init. So remove it while creating dwc3_device objects. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: k2l: Fix device speedsLokesh Vutla2015-08-28-1/+1
| | | | | | | | | | | ARM supported speeds and init value of core_pll for SDP1200 are programmed wrong as part for the device speed cleanups. Fixing it here. Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection") Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Update READMELokesh Vutla2015-08-28-11/+15
| | | | | | | Update README to include uart boot mode support and makefile changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Rename u-boot-nand.gph to MLOLokesh Vutla2015-08-28-5/+5
| | | | | | | | | | | | | | NAND boot mode, ROM expects an image with a gp header in the beginning and an 8bytes filled with zeros at the end. The same is true for SD boot on K2G platforms but the file name should be MLO. Renaming u-boot-nand.gph to MLO, so that same image can be used for NAND and SD boots. And also not including all the u-boot only images under CONFIG_SPL_BUILD. Reported-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2015-08-28-0/+3
| | | | | | | | | | | | | | | | | | | DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Add iodelay values for SR2.0Nishanth Menon2015-08-28-11/+83
| | | | | | | | | | | | | | | Silicon revision 2.0 has new signal routing hence has an updated set of iodelay parameters to be used. Update the configuration for the same. Padmux remains the same. Based on data from VayuES2_EVM_Base_Config-20150807. NOTE: With respect to the RGMII values, the Manual IODelay values are used for the fine adjusments needed to meet the tight RGMII specification. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDRTom Rini2015-08-12-0/+8
| | | | | | | | - Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and into Kconfig proper. - While in here, enable CONFIG_SPL_STACK_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: keystone2: Remove unsed external clocksLokesh Vutla2015-08-12-16/+2
| | | | | | | | Remove unused external clocks and make a common definition for all keystone platforms. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Cleanup init_pll definitionLokesh Vutla2015-08-12-41/+74
| | | | | | | | | This is just a cosmetic change that makes the calling of pll init code looks much cleaner. Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Fix dev and arm speed detectionLokesh Vutla2015-08-12-26/+42
| | | | | | | | | Use common devspeed and armspeed definitions. Also fix reading efuse bootrom register. Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Cleanup PLL init codeLokesh Vutla2015-08-12-1/+12
| | | | | | | | | | | There are two types of PLL for all keystone platforms: Main PLL, Secondary PLL. Instead of duplicating the same definition for each secondary PLL, have a common function which does initialization for both PLLs. And also add proper register definitions. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSBPaul Kocialkowski2015-08-05-5/+5
| | | | | | | | | USB-related options are usually prefixed with CONFIG_USB and platform-specific adaptation for the MUSB controller already have a CONFIG_USB_MUSB prefix, so this switches all MUSB-related options to a CONFIG_USB_MUSB prefix, for consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDRNishanth Menon2015-07-27-1/+1
| | | | | | | | | | CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do just like what the rest of the world does. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-By: Murali Karicheri <m-karicheri2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* board: ks2: README: fix typosNishanth Menon2015-07-27-2/+1
| | | | | | | | Fix up a few typos in documentation. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Murali Karicheri <m-karicheri2@ti.com>
* ARM: beagle_x15: prevent DCAN1 _wait_target_disable failure in kernelRoger Quadros2015-07-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | If board is booted with transitions happening on DCAN1 pins then the following warning is seen in the kernel at boot when the hwmod layer initializes. "omap_hwmod: dcan1: _wait_target_disable failed" This is because DCAN1 module's SWAKEUP mechanism is broken and it fails to correctly turn OFF if it sees a transition on the DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode while enabling/disabling DCAN1 module. The hwmod layer enables and disables all modules at boot and we have no opportunity to put the DCAN1 pins in safe mode at that point. DCAN1 is not used by u-boot so it doesn't matter to it if these pins are in safe mode. The kernel driver correctly configures the right mode when DCAN1 is active. Signed-off-by: Roger Quadros <rogerq@ti.com> [trini: s/PULLUP/PULL_UP/ based on DRA7xx EVM version of this patch] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7-evm: prevent DCAN1 _wait_target_disable failure in kernelRoger Quadros2015-07-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | If board is booted with transitions happening on DCAN1 pins then the following warning is seen in the kernel at boot when the hwmod layer initializes. "omap_hwmod: dcan1: _wait_target_disable failed" This is because DCAN1 module's SWAKEUP mechanism is broken and it fails to correctly turn OFF if it sees a transition on the DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode while enabling/disabling DCAN1 module. The hwmod layer enables and disables all modules at boot and we have no opportunity to put the DCAN1 pins in safe mode at that point. DCAN1 is not used by u-boot so it doesn't matter to it if these pins are in safe mode. The kernel driver correctly configures the right mode when DCAN1 is active. Signed-off-by: Roger Quadros <rogerq@ti.com>
* ARM: DRA72x: fix io delay calibration for ethernetMugunthan V N2015-07-07-24/+25
| | | | | | | | | | | | | | | | | we currently use in-development IODelay values for DRA72x which are proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet Phy over RGMII. The PHY characteristics and routing choices made on the EVM, make the current iodelay values fail ethernet communication. Instead, we need to choose custom values for DRA72x-evm specifically designed for the PHY and routing on the platform for ethernet to function. Cc: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* board: am43xx: Add maintainer informationLokesh Vutla2015-07-07-0/+2
| | | | | | | | am43xx_evm_ethboot/usbhost_boot_defconfig entries are missing in MAINTAINER file. Adding entries for them. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: BeagleBoard-X15: Enable VTT regulatorLokesh Vutla2015-06-19-0/+23
| | | | | | | | BeagleBoard-X15 uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* am33xx: Re-enable SW levelling for DDR2Tom Rini2015-06-15-0/+33
| | | | | | | | | | | | | The recent changes for hw leveling on am33xx were not intended for DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config value to check against. This lets us pass in the value we would use to configure, when we have not yet configured the board yet. In other cases update the call to be as functional as before and check an already programmed value in. Tested-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
generated by cgit v1.1 at 2024-11-02 03:35:42 +0000