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* kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-29-15/+0
| | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-10-27-9/+316
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| * omap3/am33xx: mux: fix several checkpatch issuesIgor Grinberg2014-10-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch issues: CHECK: No space is necessary after a cast \#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39: +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST> \#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284: +#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C ERROR: space required after that ',' (ctx:VxV) \#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446: +#define MUX_VAL(OFFSET,VALUE)\ ^ Cc: Raphael Assenat <raph@8d.com> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Nishanth Menon <nm@ti.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefan Roese <sr@denx.de>
| * am335x_boneblack: Only modify NAND/NOR/MMC1 pinmux on BBB in boneblack builds.Tom Rini2014-10-23-2/+2
| | | | | | | | | | | | | | | | | | | | In the case of Beaglebone Black we only want to set the NAND or NOR cape pinmux when the config has been specifically modified by the user for this non-default case. Make the default be to set the MMC1 (eMMC) pinmux. We don't need similar changes for Beaglebone White as there is nothing on MMC1 by default there. Signed-off-by: Tom Rini <trini@ti.com>
| * keystone2: ecc: add ddr3 error detection and correction supportVitaly Andrianov2014-10-23-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 ECC support to enable ECC in the DDR3 EMIF controller for Keystone II devices. By default, ECC will only be enabled if RMW is supported in the DDR EMIF controller. The entire DDR memory will be scrubbed to zero using an EDMA channel after ECC is enabled and before u-boot is re-located to DDR memory. An ecc_test environment variable is added for ECC testing. If ecc_test is set to 0, a detection of 2-bit error will reset the device, if ecc_test is set to 1, 2-bit error detection will not reset the device, user can still boot the kernel to check the ECC error handling in kernel. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * board: k2e_evm: add network supportHao Zhang2014-10-23-1/+67
| | | | | | | | | | | | | | | | | | | | This patch adds network support code and enables keystone_net driver usage for k2e_evm evaluation board. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * ARM: keystone: clock: add support for K2E SoCsKhoronzhuk, Ivan2014-10-23-0/+1
| | | | | | | | | | | | | | | | For K2E and K2L SoCs clock output from PASS PLL has to be enabled after NETCP domain and PA module are enabled. So create new function for that and call it after PA module is enabled. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * net: keystone_net: remove redundant code from keystone_net.cKhoronzhuk, Ivan2014-10-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused tx_send_loop variable. Removes duplicated get_link_status() call from the keystone2_eth_send_packet(). The emac_gigabit_enable() is called at opening Ethernet and there is no need to enable it on sending each packet. So remove that call from keystone2_eth_send_packet() as well. The calling of power/clock up functions are mostly the responsibility of SoC/board code, so move these functions to appropriate place. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * net: keystone_net: move header file from arch to ti-commonKhoronzhuk, Ivan2014-10-23-3/+3
| | | | | | | | | | | | | | | | | | | | The header file for the driver should be in correct place. So move it to "arch/arm/include/asm/ti-common/keystone_net.h" and correct driver's external dependencies. At the same time align and correct some definitions. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone2: k2l-evm: add board supportHao Zhang2014-10-23-0/+169
| | | | | | | | | | | | | | | | This patch adds Keystone II Lammar (K2L) EVM board support. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * ARM: keystone2: spl: move board specific codeHao Zhang2014-10-23-0/+43
| | | | | | | | | | | | | | | | | | The initialization of PLLs is a part of board specific code, so move it appropriate places. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | dm: omap3: Move to driver model for GPIO and serialSimon Glass2014-10-23-48/+60
|/ | | | | | | | Adjust the configuration for the am33xx boards, including beagleboard, to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com>
* ks2_evm: readme: align according to actual sourcesKhoronzhuk, Ivan2014-10-10-31/+44
| | | | | | | | | | Update readme file for Keystone II EVM boards to actual sources. Also correct some typos. For now the Edison evaluation board is added, README for K2E is mostly the same, so update README to contain information also for K2E evm. Rename file to README as it contains information for all keystone evm boards. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* beagleboard: Remove side effects of i2c2 pullup resisters initialization codeAlexander Kochetkov2014-10-10-1/+4
| | | | | | | | | | | | | | | | | | | Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89. i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1. It's value after reset is 0x00100001. In order to clear bit 0, original code write 0xfffffffe to CONTROL_PROG_IO1 and toggle almost all default values. Original code affect following: * disable i2c1 pullup resisters * increase far end load setting for many modules * setup invalid SC/LB combination Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> CC: Tom Rini <trini@ti.com> CC: Steve Kipisz <s-kipisz2@ti.com>
* OMAP5+: sata/scsi: Implement scsi_init()Roger Quadros2014-10-10-7/+0
| | | | | | | | | | On OMAP platforms, SATA controller provides the SCSI subsystem so implement scsi_init(). Get rid of the unnecessary sata_init() call from dra7xx-evm and omap5-uevm board files. Signed-off-by: Roger Quadros <rogerq@ti.com>
* MAINTAINERS: comment out blank M: fieldMasahiro Yamada2014-09-24-2/+2
| | | | | | | | | | | | | | | | | | Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4 (patman: RunPipe() should not pipe stdout/stderr unless asked), Patman spits lots of "Invalid MAINTAINERS address: '-'" error messages for patches with global changes. It takes too long for Patman to process them. Anyway, "M: -" does not carry any important information. Rather, it is just like a place holder in case of assigning a new board maintainer. Let's comment out. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* MAINTAINERS: comment out invalid maintainersMasahiro Yamada2014-09-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The "S: Orphan" in MAINTAINERS means that the maintainer in the "M:" field is unreachable (i.e. the email address is not working). (Refer to the definition of "Orphan" adopted in U-Boot in the log of commit 31f1b654b2f395b69faa5d0d3c1eb0803923bd3b, "boards.cfg: move boards with invalid emails to Orphan") For patch files adding global changes, scripts/get_maintainer.pl adds bunch of such invalid email addresses, which results in tons of annoying bounce emails. This commit can be reproduced by the following command: find . -name MAINTAINERS | xargs sed -i -e ' /^M:[[:blank:]]/ { N /S:[[:blank:]]Orphan/s/^/#/ } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-21-0/+4
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| * ARM: keystone: ddr3: workaround for ddr3a/3b memory issueMurali Karicheri2014-09-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for and executes a software-controlled hard reset.In board_early_init, where logic has been added to identify whether or not the previous reset was a PORz. PLL initialization is skipped in the case of a software-controlled hard reset. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Keegan Garcia <kgarcia@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-61/+0
|/ | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* arm: am335x: add Kconfig range attribute to prevent invalid CONS_INDEXMasahiro Yamada2014-09-04-0/+1
| | | | | | | | The help message in board/ti/am335x/Kconfig says AM335x has 6 UARTs, so the valid number for CONFIG_CONS_INDEX is from 1 to 6. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
* keystone: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-16/+0
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Keystone board select menu to keystone/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="keystone"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com>
* omap5: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-16/+0
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP5 board select menu to omap5/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap5"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
* omap4: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-16/+0
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP4 board select menu to omap4/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap4"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
* omap3: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-48/+0
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP3 board select menu to omap3/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap3 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-08-29-105/+267
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| * ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+32
| | | | | | | | | | | | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * am335x_evm: Convert CONFIG_CONS_INDEX into a menu choiceTom Rini2014-08-25-18/+17
| | | | | | | | | | | | | | | | | | | | - Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead - Add choice and help text to board/ti/am335x/Kconfig - Correct comment about IDK in board/ti/am335x/mux.c - Remove am335x_evm_uart* defconfig files as they're just variations on a config option now. Signed-off-by: Tom Rini <trini@ti.com>
| * keystone2: use EFUSE_BOOTROM information to configure PLLsVitaly Andrianov2014-08-25-8/+44
| | | | | | | | | | | | | | | | | | This patch reads EFUSE_BOOTROM register to see the maximum supported clock for CORE and TETRIS PLLs and configure them accordingly. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM. The Flash device is connected to GPMC controller on chip-select[0] and accessed as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and is CFI compatible. As multiple devices are share GPMC pins on this board, so following board settings are required to detect NOR device: SW5.1 (NAND_BOOTn) = OFF (logic-1) SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations: SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Also, following changes are required to enable NOR Flash support in dra7xx_evm board profile:
| * board/ti/dra7xx: add support for parallel NANDpekon gupta2014-08-25-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC chip-select[0] on DRA7xx EVM. As GPMC pins are shared by multiple devices, so in addition to this patch following board settings are required for NAND device detection [1]: SW5.9 (GPMC_WPN) = OFF (logic-1) SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */ SW5.2 (NOR_BOOTn) = OFF (logic-1) SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */ SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */ SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */ SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */ SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */ SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */ SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */ SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */ SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */ SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Following changes are required in board.cfg to enable NAND on J6-EVM:
| * board/ti/am43xx: add support for parallel NANDpekon gupta2014-08-25-1/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for NAND device connected to GPMC chip-select on following AM43xx EVM boards. am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a time either eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled by: (a) Statically using Jumper on connecter (J89) present on board. (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled by driving SPI2_CS0[MUX_MODE=GPIO] pin via software: SPI2_CS0 == 0: NAND (default) SPI2_CS0 == 1: eMMC am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI, Thus only one of the two can be used at a time. Selection is controlled by: (a) Dynamically driving following GPIO pin from software GPMC_A0(GPIO) == 0 NAND is selected (default) NAND device (MT29F4G08AB) on these boards has: - data-width=8bits - blocksize=256KB - pagesize=4KB - oobsize=224 bytes For above NAND device, ROM code expects the boot-loader to be flashed in BCH16 ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * board/ti/am335x: add support for beaglebone NOR Capepekon gupta2014-08-25-60/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support of NOR cape[1] for both Beaglebone (white) and Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC chip-select[0] and accesses as external memory-mapped device. This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device. As GPMC chip-select[0] can be shared by multiple capes so NOR profile is not enabled by default in boards.cfg. Following changes are required to enable NOR cape detection when building am335x_boneblack board profile. Signed-off-by: Tom Rini <trini@ti.com>
| * board/ti/am335x: add support for beaglebone NAND capepekon gupta2014-08-25-20/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Beaglebone Board can be connected to expansion boards to add devices to them. These expansion boards are called 'capes'. This patch adds support for following versions of Beaglebone(AM335x) NAND capes (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 Further information and datasheets can be found at [1] and [2] * How to boot from NAND using Memory Expander + NAND Cape ? * - Important: As BOOTSEL values are sampled only at POR, so after changing any setting on SW2 (DIP switch), disconnect and reconnect all board power supply (including mini-USB console port) to POR the beaglebone. - Selection of ECC scheme for NAND cape(a), ROM code expects BCH8_HW ecc-scheme for NAND cape(b), ROM code expects BCH16_HW ecc-scheme - Selction of boot modes can be controlled via DIP switch(SW2) present on Memory Expander cape. SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2) So to flash NAND, first boot via MMC or other sources and then switch to SW2[SWITCH_BOOT]=ON to boot from NAND Cape. - For NAND boot following switch settings need to be followed SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected ) SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- ) SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- ) SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- ) SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- ) SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device ) SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM ) SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device ) SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- ) [1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion [2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module *IMPORTANT NOTE* As Beaglebone board shares the same config as AM335x EVM, so following changes are required in addition to this patch for Beaglebone NAND cape. (1) Enable NAND in am335x_beaglebone board profile (2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because: - AM335x EVM has NAND device with datawidth=8, whereas - Beaglebone NAND cape has NAND device with data-width=16
* | omap: remove omap5912osk board supportMasahiro Yamada2014-08-21-852/+0
|/ | | | | | | | | | | | | | Emails to the board maintainer "Rishi Bhattacharya <rishi@ti.com>" have been bouncing. Tom suggested to remove this board. Remove also omap1510_udc.c because this is the last board to enable it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com>
* Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+114
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+417
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-28-420/+589
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| * board: k2e-evm: add board supportHao Zhang2014-07-25-0/+139
| | | | | | | | | | | | | | This patch adds Keystone2 k2e_evm evaluation board support. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone: ddr3: move K2HK DDR3 configuration to a common fileHao Zhang2014-07-25-285/+172
| | | | | | | | | | | | | | | | | | | | | | It's convenient to hold configurations for DDR3 PHY and EMIF in separate common place. This patch moves K2HK DDR3 PHY and EMIF configuration data with different rates and memory size to a common ddr3_cfg.c file. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * ARM: keystone2: move K2HK board files to common KS2 board directoryHao Zhang2014-07-25-102/+140
| | | | | | | | | | | | | | | | | | | | This patch moves K2HK board directory to a common Keystone II board directory. The Board related common functions are moved to a common keystone board file. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone2: add env option to do unitrd dt fixupMurali Karicheri2014-07-25-1/+5
| | | | | | | | | | | | | | | | | | | | With latest v3.13 kernel, unitrd dt fixup is not needed. However for older kernel versions such as v3.8/v3.10, it is needed. So to work with both, add a u-boot env variable that can be set to do dt fixup for older kernels. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * k2hk: use common KS2_ prefix for all hardware definitionsKhoronzhuk, Ivan2014-07-25-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use KS2_ prefix in all definitions, for that replace K2HK_ prefix and add KS2_ prefix where it's needed. It requires to change names also in places where they're used. Align lines and remove redundant definitions in kardware-k2hk.h at the same time. Using common KS2_ prefix helps resolve redundant redefinitions and adds opportunity to use KS2_ definition across a project not thinking about what SoC should be used. It's more convenient and we don't need to worry about the SoC type in common files, hardware.h will think about that. The hardware.h decides definitions of what SoC to use. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone2: move cpu_to_bus() to keystone.cHao Zhang2014-07-25-14/+0
| | | | | | | | | | | | | | | | | | The SoC related common functions in board.c should be placed to a common keystone.c arch file. Acked-by: Murali Karicheri <m-maricheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone2: ddr: add DDR3 PHY configs updated for PG 2.0Hao Zhang2014-07-25-2/+78
| | | | | | | | | | | | | | | | | | Add DDR3 PHY configs updated for PG 2.0 Also add DDR3A PHY reset before init for PG2.0 SoCs. Acked-by: Murali Karicheri <m-maricheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * keystone: ddr3: add ddr3.h to hold ddr3 APIKhoronzhuk, Ivan2014-07-25-12/+18
| | | | | | | | | | | | | | | | It's convinient to hold ddr3 function definitions in separate file such as ddr3.h. So move this from hardware.h to ddr3.h. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * am335x_evm / gumstix pepper: Correct DDR settingsTom Rini2014-07-25-27/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As noted by clang, we have been shifting certain values out of 32bit range when setting some DDR registers. Upon further inspection these had been touching reserved fields (and having no impact). These came in from historical bring-up code and can be discarded. Similarly, we had been declaring some fields as 0 when they will be initialized that way. Tested on Beaglebone White. Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Ash Charles <ash@gumstix.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-By: Ash Charles <ashcharles@gmail.com>
| * k2hk_evm: add script to automate NAND flash processKhoronzhuk, Ivan2014-07-25-1/+27
| | | | | | | | | | | | | | | | | | | | Add script to automate NAND flash process. As for now the board has two burn scripts - burn to boot from SPI NOR flash and burn to boot from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi. Also update README to contain NAND burn U-boot process description. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com>
| * tps65218/am43xx_evm: Add power framework support to TPS65218Tom Rini2014-07-25-0/+14
| | | | | | | | | | | | | | | | Add in an init function for the drivers/power framework so we can dump and read the registers via i2c. Cc: Łukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: dra7_evm: Add Ethernet support for dra72x platformMugunthan V N2014-07-25-1/+6
| | | | | | | | | | | | Set the active_slave to 1 as slave 1 is pinned out in dra72x base board Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
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