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path: root/board/ti/panda/panda_mux_data.h
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* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: OMAP4: PANDA: Add rest of the USB module pads to essentialsSRICHARAN R2012-07-20-22/+22
| | | | | | | | | | | | | | | | In commit 1a89a217f5c5ab3645c80c1247e8911a8b5ad491 we moved most of the required pads and mux data for USB to the essential list so that later on we could NOT enable anything that wasn't essential unless otherwise configured. This was however missing a few pandaboard-specific parts which left for example USB ethernet non-functional. Tested this on OMAP4430 ES2.2, OMAP4460 ES1.1 PANDA boards. (Reworded by Tom Rini to be more precise about what the problem was) Signed-off-by: R Sricharan <r.sricharan@ti.com> Tested-by: Gary Thomas <gary@mlbassoc.com> Tested-by: Tom Rini <trini@ti.com>
* omap4: panda: disable uart2 pads during bootTero Kristo2012-05-15-4/+4
| | | | | | | | | If uart2 is enabled during boot, spurious wifi chip transmission will hang the module and it is impossible to recover from this situation without hard reset. This will prevent any l4_per domain idle transitions. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* OMAP4460: TPS Ensure SET1 is selected after voltage configurationNishanth Menon2012-05-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms. Currently we control this pin with a mux configuration as part of boot sequence. Current configuration results in the following voltage waveform: |---------------| (SET1 default 1.4V) | --------(programmed voltage) | <- (This switch happens on mux7,pullup) vdd_mpu(TPS) -----/ (OPP boot voltage) --------- (programmed voltage) vdd_core(TWL6030) -----------------------/ (OPP boot voltage) Problem 1) |<----- Tx ------>| timing violation for a duration Tx close to few milliseconds. Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP. By using GPIO as recommended as standard procedure by TI, the sequence changes to: -------- (programmed voltage) vdd_mpu(TPS) ------------/ (Opp boot voltage) --------- (programmed voltage) vdd_core(TWL6030) -------------/ (OPP boot voltage) NOTE: This does not attempt to address OMAP5 - Aneesh please confirm Reported-by: Isabelle Gros <i-gros@ti.com> Reported-by: Jerome Angeloni <j-angeloni@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP4: ehci-omap: enable ehci-omap for panda boardsGovindraj.R2012-02-12-8/+8
| | | | | | | | For panda initialise the mux pins for ehci usage and enable ehci in omap4_panda config file. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
* omap4460: fix TPS initializationAneesh V2011-12-06-1/+1
| | | | | | | | | | | TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
* omap5: Add minimal support for omap5430.Sricharan2011-11-15-1/+53
| | | | | | | | | | | | | | | | This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: splitting padconfs into common, 4430 and 4460Ricardo Salveti de Araujo2011-10-27-2/+12
| | | | | | | | | | Not all padconfs are the same between 4430 and 4460, so instead of working around this with an if, we should have an specific padconf structure for both chips (like handling the differences between the LEDs GPIOs and TPS). Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: fix pad configuration settings for SDP and PandaAneesh V2011-09-13-22/+19
| | | | | | | | | omap4: fix pad configuration settings for SDP and Panda Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: David Anders <x0132446@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-03-0/+230
- separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>