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* omap-common: Rename set_muxconf_regs_essential to set_muxconf_regsPaul Kocialkowski2016-03-15-1/+1
| | | | | | | There is no distinction between essential and non-essential mux configuration, so it doesn't make sense to have an "essential" prefix. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timingsLokesh Vutla2016-03-14-134/+188
| | | | | | | | | | | | | | All the mux configurations needs to be done as part of the IODelay sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL mode configuration as needed for DRA72-evm. Also update the mux for SD card detect on DRA74-evm. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7-evm: Update memory info in banksLokesh Vutla2016-03-14-0/+14
| | | | | | | | | | Updating the memory banks properly so that DT is populated accordingly. And updating this only after DDR is properly detected by eeprom, so that git bisect is still maintained. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: EMIF: Add 4GB DDR settingsLokesh Vutla2016-03-14-3/+80
| | | | | | | | | | The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the same. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Move emif settings to board specific filesLokesh Vutla2016-03-14-0/+129
| | | | | | | | | | The newer versions of DRA7 boards has EEPROM populated with DDR size specified in it. Moving DRA7 specific emif related settings to board files so that emif settings can be identified based on EEPROM. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Enable EEPROM supportLokesh Vutla2016-03-14-4/+58
| | | | | | | | Enable EEPROM support for DRA74-evm. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM : DRA7: Switch QSPI to use MODE-0 at 64MHzVignesh R2016-02-15-7/+23
| | | | | | | | | | According to Data Manual(SPRS915P) of AM572x, TI QSPI controller on DRA74 EVM(rev 1.1+) can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Also, add IODelay parameters for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dra7x/am57x: Remove pin input/output config from WAKEUP pinsCooper Jr., Franklin2015-11-21-1/+1
| | | | | | | | | | | The WAKEUP_X pins are always an input no matter the pinmux mode. However, the 18th bit that typical configures a pin as an input is considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP pin remove any configuration that sets that pin as an input. Since those pins are only inputs remove any output configuration from those pins. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
* board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+2
| | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
* omap-common: Common serial and usbethaddr functions based on die idPaul Kocialkowski2015-10-22-4/+1
| | | | | | | | | Now that we have a common prototype to grab the omap die id, functions to figure out a serial number and usb ethernet address can use it directly. Those also get an omap_die_id prefix for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap5: omap_die_id supportPaul Kocialkowski2015-10-22-4/+3
| | | | | | | | This introduces omap5 support for omap_die_id, which matches the common omap_die_id definition. It replaces board-specific code to grab the die id bits. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: invoke clock API to enable and disable clocksKishon Vijay Abraham I2015-08-28-0/+2
| | | | | | | | invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: remove duplicate initialization of vbus_id_statusKishon Vijay Abraham I2015-08-28-2/+0
| | | | | | | | vbus_id_status is initialized in board_usb_init. So remove it while creating dwc3_device objects. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2015-08-28-0/+3
| | | | | | | | | | | | | | | | | | | DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Add iodelay values for SR2.0Nishanth Menon2015-08-28-11/+83
| | | | | | | | | | | | | | | Silicon revision 2.0 has new signal routing hence has an updated set of iodelay parameters to be used. Update the configuration for the same. Padmux remains the same. Based on data from VayuES2_EVM_Base_Config-20150807. NOTE: With respect to the RGMII values, the Manual IODelay values are used for the fine adjusments needed to meet the tight RGMII specification. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDRTom Rini2015-08-12-0/+8
| | | | | | | | - Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and into Kconfig proper. - While in here, enable CONFIG_SPL_STACK_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7-evm: prevent DCAN1 _wait_target_disable failure in kernelRoger Quadros2015-07-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | If board is booted with transitions happening on DCAN1 pins then the following warning is seen in the kernel at boot when the hwmod layer initializes. "omap_hwmod: dcan1: _wait_target_disable failed" This is because DCAN1 module's SWAKEUP mechanism is broken and it fails to correctly turn OFF if it sees a transition on the DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode while enabling/disabling DCAN1 module. The hwmod layer enables and disables all modules at boot and we have no opportunity to put the DCAN1 pins in safe mode at that point. DCAN1 is not used by u-boot so it doesn't matter to it if these pins are in safe mode. The kernel driver correctly configures the right mode when DCAN1 is active. Signed-off-by: Roger Quadros <rogerq@ti.com>
* ARM: DRA72x: fix io delay calibration for ethernetMugunthan V N2015-07-07-24/+25
| | | | | | | | | | | | | | | | | we currently use in-development IODelay values for DRA72x which are proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet Phy over RGMII. The PHY characteristics and routing choices made on the EVM, make the current iodelay values fail ethernet communication. Instead, we need to choose custom values for DRA72x-evm specifically designed for the PHY and routing on the platform for ethernet to function. Cc: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: DRA7: CPSW: Remove IO delay hackLokesh Vutla2015-06-12-66/+0
| | | | | | | | Now all manual mode configurations are done as part of IO delay recalibration sequence, remove the hack done for CPSW. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7-evm: Add mux dataNishanth Menon2015-06-12-27/+326
| | | | | | | | | | | Adding the mux data, manual and virtual mode settings for DRA7-evm. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
* ARM: DRA7-evm: Enable IO delay recalibration sequenceLokesh Vutla2015-06-12-3/+11
| | | | | | | | | Enabling IO delay recalibration sequence for DRA7 EVM. UART and I2C are configured before IO delay recalibration sequence as these are used earlier and safe to use. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7: Make do_set_mux32() genericLokesh Vutla2015-06-12-10/+0
| | | | | | | | | do_set_mux32() is redefined in dra7xx and beagle_x15 boards. IO delay recalibration sequence also needs this. Making it generic to avoid duplication. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7: Set serial number environment variableDileep Katta2015-04-23-0/+6
| | | | | | | | | | | | | | | | | This patch populates serial number environment variable from die_id_0 and die_id_1 register values for DRA7xx boards. The function is added in omap common code so that this can be re-used. Serial# environment variable will be useful to show correct information in "fastboot devices" commands. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-18-2/+2
| | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* usb: modify usb_gadget_handle_interrupts to take controller indexKishon Vijay Abraham I2015-04-14-3/+3
| | | | | | | | | | | | | | Since we support multiple dwc3 controllers to be existent at the same time, in order to handle the interrupts of a particular dwc3 controller usb_gadget_handle_interrutps should take controller index as an argument. Hence the API of usb_gadget_handle_interrupts is modified to take controller index as an argument and made the corresponding changes to all the usb_gadget_handle_interrupts calls. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* board: ti: DRA7: added USB initializtion codeKishon Vijay Abraham I2015-04-14-0/+109
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in dra7xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ARM: OMAP5: DRA7xx: Fix misleading comments in mux_data.hLubomir Popov2014-12-04-2/+2
| | | | | | | | | | The comments on the QSPI pad assignments erronously swapped the qspi1_d0 and qspi1_d1 functionality and could cause confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16), and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing comments. Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* arm: omap5: don't enable misc_init_r by defaultFelipe Balbi2014-12-04-12/+0
| | | | | | | | | | Out of all OMAP5-like boards, only one of them needs CONFIG_MISC_INIT_R, so it's best to enable that for that particular board only, instead of enabling for all boards unconditionally. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* OMAP5+: sata/scsi: Implement scsi_init()Roger Quadros2014-10-10-1/+0
| | | | | | | | | | On OMAP platforms, SATA controller provides the SCSI subsystem so implement scsi_init(). Get rid of the unnecessary sata_init() call from dra7xx-evm and omap5-uevm board files. Signed-off-by: Roger Quadros <rogerq@ti.com>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-3/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* omap5: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-8/+0
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the OMAP5 board select menu to omap5/Kconfig. Move also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="omap5"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+32
| | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM. The Flash device is connected to GPMC controller on chip-select[0] and accessed as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and is CFI compatible. As multiple devices are share GPMC pins on this board, so following board settings are required to detect NOR device: SW5.1 (NAND_BOOTn) = OFF (logic-1) SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations: SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Also, following changes are required to enable NOR Flash support in dra7xx_evm board profile:
* board/ti/dra7xx: add support for parallel NANDpekon gupta2014-08-25-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC chip-select[0] on DRA7xx EVM. As GPMC pins are shared by multiple devices, so in addition to this patch following board settings are required for NAND device detection [1]: SW5.9 (GPMC_WPN) = OFF (logic-1) SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */ SW5.2 (NOR_BOOTn) = OFF (logic-1) SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */ SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */ SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */ SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */ SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */ SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */ SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */ SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */ SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */ SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Following changes are required in board.cfg to enable NAND on J6-EVM:
* Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+8
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-28-1/+18
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| * ARM: dra7_evm: Add Ethernet support for dra72x platformMugunthan V N2014-07-25-1/+6
| | | | | | | | | | | | Set the active_slave to 1 as slave 1 is pinned out in dra72x base board Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: DRA7xx: Add cpsw second port pinmuxMugunthan V N2014-07-25-0/+12
| | | | | | | | | | | | Add cpsw second slave port pinmux to use it as primary ethernet port Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* | ARM: DRA7xx: Update the board_name env variableLokesh Vutla2014-07-14-0/+6
| | | | | | | | | | | | | | Update the board_name env variable and accordingly populate the dtb file. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: dra7xx: add mux data for UART3Felipe Balbi2014-07-07-0/+5
|/ | | | | | | | | | | | | J6 EVM can be built with UART3 as console, but currently there's nothing muxing UART3 correctly. Likely this only works because, based on commit log, author was only testing with UART3 boot and - I assume - ROM code leave UART3 correctly muxed in that case. If we want to boot from MMC and still use UART3 as console, then we need to mux those signals correctly. Signed-off-by: Felipe Balbi <balbi@ti.com>
* dra7xx_evm: Add QSPI_4 support, qspiboot build targetTom Rini2014-04-17-0/+19
| | | | | | | | | | | | We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad) read support as well. This means we can be given one of two boot device values, but don't care which it is, so perform a fixup on the QSPI_4 value. We add a qspiboot build target to better show how you would use QSPI as a boot device in deployment. When we boot from QSPI, we can check the environment for 'boot_os' to control Falcon Mode. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* mmc: Add 'mmc rst-function' sub-commandTom Rini2014-04-02-0/+1
| | | | | | | | | | | | Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value in order for warm reset of the system to work. Details on this being required will be part of the eMMC datasheet. Also add using this command to the dra7xx README. * Whitespace fix by panto Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* ARM: DRA7xx: add support for reading cpsw 2nd mac from efuseMugunthan V N2014-03-04-0/+15
| | | | | | | | | Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also correct the bit masking of mac id read from the efuse. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-2/+2
| | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: O5/dra7xx: Add SATA boot supportDan Murphy2014-02-19-1/+2
| | | | | | | | | | | | | Add the SATA boot support for OMAP5 and dra7xx. Renamed the omap_sata_init to the common init_sata(int dev) for commonality in with sata stack. Added the ROM boot device ID for SATA. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* dra7xx_evm: Add CONFIG_SUPPORT_EMMC_BOOT, document usageTom Rini2014-02-07-0/+25
| | | | | | | | | Add a README to the board which lists the commands required to enable booting from the eMMC boot partitions found on the board. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* ARM: dra7_evm: read mac address properly from e-fuseMugunthan V N2014-01-07-4/+4
| | | | | | | Byte offset of Ethernet mac address read from e-fuse are wrong so DHCP is not working on some boards, modifying the offset to read properly. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: dra7_evm: Add SATA supportRoger Quadros2013-12-04-0/+7
| | | | | | | The evm has a SATA port. Enable SATA configuration and inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
* board: ti: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-26/+1
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-11-07 14:37:41 +0000