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* ARM: dts: dra71x-evm: Add DT supportLokesh Vutla2016-12-04-1/+4
| | | | | | | Add DT support for dra71-evm and built it as part of FIT image. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add PMIC supportKeerthy2016-12-04-0/+52
| | | | | | | | | | | | | | | Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra72: Introduce optimization for rgmii timing for rev CNishanth Menon2016-12-04-25/+50
| | | | | | | | | | | Rev C version of EVM does require IODelay to be configured for RGMII pins in MANUAL_1 configuration. Update the same based on PG2.0 initial simulation values. Data based on PCT_DRA72x_SR2.0_SR1.0_v1.3.0.7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add mux settingsLokesh Vutla2016-12-04-1/+206
| | | | | | | | Add mux and iodelay settings for dra71x-evm. Data generated using PCT_DRA71x_SR2.0_v1.0.0.0 version (June 2016). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add epprom supportLokesh Vutla2016-12-04-0/+5
| | | | | | | | | | | | | | The dra71x-evm is a board based on TI's DRA718 processor targeting BOM-optimized entry infotainment systems such as display audio and is a software compatible derivative of the highly successful DRA74 and DRA72 processor families. More information can be found here[1]. Add epprom detection for dra71-evm. [1] http://www.ti.com/product/dra718 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP4+: Add support for dynamically selecting OPPsLokesh Vutla2016-12-04-20/+71
| | | | | | | | | | | It can be expected that different paper spins of a SoC can have different definitions for OPP and can have their own constraints on the boot up OPP for each voltage rail. In order to have this flexibility, add support for dynamically selecting the OPP voltage based on the board to handle any such exceptions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra7xx: add FIT image TEE processingAndrew F. Davis2016-12-03-0/+7
| | | | | | | | | Populate the corresponding TEE image processing call to be performed during FIT loadable processing. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Make FIT boot as default boot on HS devicesLokesh Vutla2016-12-03-0/+7
| | | | | | | | Verification has to be done before booting any images on HS devices. So default the boot to FIT on HS devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra7xx: complex definitions should be protected with parenthesesMugunthan V N2016-10-08-4/+4
| | | | | | | | | As a standard practice complex definitions should be protected with parentheses, as it might fail when used in a complex if statements. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: dra72: add rev C evm supportMugunthan V N2016-10-08-5/+11
| | | | | | | | | | | Add DTS support for dra72 evm Rev C which has the following changes * Two ethernet ports now instead of the single one in rev B. * DP83867 ethernet phy instead of DP838865. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: omap5: add U-Boot FIT signing and SPL image post-processingAndreas Dannenberg2016-07-14-0/+9
| | | | | | | | | | | | | | | Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ti_omap5_common: Find right dtb file for DRA72-RevC EvmLokesh Vutla2016-07-01-3/+7
| | | | | | DRA72-Evm revC uses dra72-evm-revc.dtb. Update the same in env vatiables. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* arm: dra7xx: Assign omap_vcores based on board typeKeerthy2016-06-12-0/+91
| | | | | | | | | | Currently omap_vcores which holds pmic data is being assigned based on the SoC type. PMIC is not a part of SoC. It is logical to to assign omap_vcores based on board type. Hence over ride the vcores_init function and assign omap_vcores based on the board type. Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
* ARM: DRA7xx: Enable FIT for hs platformsLokesh Vutla2016-06-06-0/+1
| | | | | | | Use a single defconfig for all DRA7xx hs platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: configs: Remove obsolete configsLokesh Vutla2016-05-27-2/+0
| | | | | | | | | | | | | | | | | Removing: uart3_defconfig: Now uart3 can be selected using menuconfig, removing separate config for uart mode. Doing uart boot is not straight forward as ROM uses uart3 as default serial console. In order to boot to prompt, concole in both u-boot and kernel needs to be changed. qspiboot_defconfig: The only advantage of enabling QSPI_BOOT is selecting env in QSPI. Eventually env needs to be selected by menuconfig so removing qspiboot_defconfig. qspiboot can be done using dra7xx_evm_defconfig. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Enable FITLokesh Vutla2016-05-27-2/+0
| | | | | | | | Use a single defconfig for all DRA7 platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: dra7: fit: add support for selecting dtb dynamicallyLokesh Vutla2016-05-27-0/+12
| | | | | | | | FIT allows for a multiple dtb in a single image. SPL needs a way to detect the right dtb to be used. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: omap5: add ft_board_setup for dra7xx/am57xxDaniel Allred2016-05-27-0/+9
| | | | | | | | | | | | | | Adds the board specific ft_board_setup() functions that are called when CONFIG_OF_BOARD_SETUP is defined. These functions will currently just call the ft_cpu_setup() function. Adds CONFIG_OF_BOARD_SETUP to the defconfig files for dra72_evm, dra74_evm, and am57xx_evm. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: DRA7: Add DP83867 TI phy for rev cDan Murphy2016-04-01-0/+6
| | | | | | | | | | | Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required. Signed-off-by: Dan Murphy <dmurphy@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: DRA7: Add DRA72-rev C evm pinmuxNishanth Menon2016-03-27-36/+110
| | | | | | | | | | | | Add the pinmux data for rev C evm. This is different from previous revisions of the platform thanks to the deltas introduced both from silicon side and from SoC side. Based on J6EcoES2_EVM_Base_Config-20160309b and PCT-DRA72x-v1.3.0.7 for SR2.0 silicon. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: DRA72: revC evm: Update sdram timing configuration for SR2.0Ravi Babu2016-03-27-4/+55
| | | | | | | | | | | | | | | DDR configuration has changes from SR1.1 based Rev-A/B version of evm to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB. Update the DDR configuration based on data from EMIF configuration tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the configuration. Tested-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap-common: Rename set_muxconf_regs_essential to set_muxconf_regsPaul Kocialkowski2016-03-15-1/+1
| | | | | | | There is no distinction between essential and non-essential mux configuration, so it doesn't make sense to have an "essential" prefix. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timingsLokesh Vutla2016-03-14-134/+188
| | | | | | | | | | | | | | All the mux configurations needs to be done as part of the IODelay sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL mode configuration as needed for DRA72-evm. Also update the mux for SD card detect on DRA74-evm. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7-evm: Update memory info in banksLokesh Vutla2016-03-14-0/+14
| | | | | | | | | | Updating the memory banks properly so that DT is populated accordingly. And updating this only after DDR is properly detected by eeprom, so that git bisect is still maintained. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: EMIF: Add 4GB DDR settingsLokesh Vutla2016-03-14-3/+80
| | | | | | | | | | The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the same. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Move emif settings to board specific filesLokesh Vutla2016-03-14-0/+129
| | | | | | | | | | The newer versions of DRA7 boards has EEPROM populated with DDR size specified in it. Moving DRA7 specific emif related settings to board files so that emif settings can be identified based on EEPROM. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7: Enable EEPROM supportLokesh Vutla2016-03-14-4/+58
| | | | | | | | Enable EEPROM support for DRA74-evm. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM : DRA7: Switch QSPI to use MODE-0 at 64MHzVignesh R2016-02-15-7/+23
| | | | | | | | | | According to Data Manual(SPRS915P) of AM572x, TI QSPI controller on DRA74 EVM(rev 1.1+) can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Also, add IODelay parameters for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dra7x/am57x: Remove pin input/output config from WAKEUP pinsCooper Jr., Franklin2015-11-21-1/+1
| | | | | | | | | | | The WAKEUP_X pins are always an input no matter the pinmux mode. However, the 18th bit that typical configures a pin as an input is considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP pin remove any configuration that sets that pin as an input. Since those pins are only inputs remove any output configuration from those pins. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
* board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+2
| | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
* omap-common: Common serial and usbethaddr functions based on die idPaul Kocialkowski2015-10-22-4/+1
| | | | | | | | | Now that we have a common prototype to grab the omap die id, functions to figure out a serial number and usb ethernet address can use it directly. Those also get an omap_die_id prefix for better consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap5: omap_die_id supportPaul Kocialkowski2015-10-22-4/+3
| | | | | | | | This introduces omap5 support for omap_die_id, which matches the common omap_die_id definition. It replaces board-specific code to grab the die id bits. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: invoke clock API to enable and disable clocksKishon Vijay Abraham I2015-08-28-0/+2
| | | | | | | | invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: remove duplicate initialization of vbus_id_statusKishon Vijay Abraham I2015-08-28-2/+0
| | | | | | | | vbus_id_status is initialized in board_usb_init. So remove it while creating dwc3_device objects. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2015-08-28-0/+3
| | | | | | | | | | | | | | | | | | | DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Add iodelay values for SR2.0Nishanth Menon2015-08-28-11/+83
| | | | | | | | | | | | | | | Silicon revision 2.0 has new signal routing hence has an updated set of iodelay parameters to be used. Update the configuration for the same. Padmux remains the same. Based on data from VayuES2_EVM_Base_Config-20150807. NOTE: With respect to the RGMII values, the Manual IODelay values are used for the fine adjusments needed to meet the tight RGMII specification. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDRTom Rini2015-08-12-0/+8
| | | | | | | | - Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and into Kconfig proper. - While in here, enable CONFIG_SPL_STACK_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7-evm: prevent DCAN1 _wait_target_disable failure in kernelRoger Quadros2015-07-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | If board is booted with transitions happening on DCAN1 pins then the following warning is seen in the kernel at boot when the hwmod layer initializes. "omap_hwmod: dcan1: _wait_target_disable failed" This is because DCAN1 module's SWAKEUP mechanism is broken and it fails to correctly turn OFF if it sees a transition on the DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode while enabling/disabling DCAN1 module. The hwmod layer enables and disables all modules at boot and we have no opportunity to put the DCAN1 pins in safe mode at that point. DCAN1 is not used by u-boot so it doesn't matter to it if these pins are in safe mode. The kernel driver correctly configures the right mode when DCAN1 is active. Signed-off-by: Roger Quadros <rogerq@ti.com>
* ARM: DRA72x: fix io delay calibration for ethernetMugunthan V N2015-07-07-24/+25
| | | | | | | | | | | | | | | | | we currently use in-development IODelay values for DRA72x which are proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet Phy over RGMII. The PHY characteristics and routing choices made on the EVM, make the current iodelay values fail ethernet communication. Instead, we need to choose custom values for DRA72x-evm specifically designed for the PHY and routing on the platform for ethernet to function. Cc: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: DRA7: CPSW: Remove IO delay hackLokesh Vutla2015-06-12-66/+0
| | | | | | | | Now all manual mode configurations are done as part of IO delay recalibration sequence, remove the hack done for CPSW. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: DRA7-evm: Add mux dataNishanth Menon2015-06-12-27/+326
| | | | | | | | | | | Adding the mux data, manual and virtual mode settings for DRA7-evm. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
* ARM: DRA7-evm: Enable IO delay recalibration sequenceLokesh Vutla2015-06-12-3/+11
| | | | | | | | | Enabling IO delay recalibration sequence for DRA7 EVM. UART and I2C are configured before IO delay recalibration sequence as these are used earlier and safe to use. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7: Make do_set_mux32() genericLokesh Vutla2015-06-12-10/+0
| | | | | | | | | do_set_mux32() is redefined in dra7xx and beagle_x15 boards. IO delay recalibration sequence also needs this. Making it generic to avoid duplication. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7: Set serial number environment variableDileep Katta2015-04-23-0/+6
| | | | | | | | | | | | | | | | | This patch populates serial number environment variable from die_id_0 and die_id_1 register values for DRA7xx boards. The function is added in omap common code so that this can be re-used. Serial# environment variable will be useful to show correct information in "fastboot devices" commands. Ref: http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Dileep Katta <dileep.katta@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-18-2/+2
| | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* usb: modify usb_gadget_handle_interrupts to take controller indexKishon Vijay Abraham I2015-04-14-3/+3
| | | | | | | | | | | | | | Since we support multiple dwc3 controllers to be existent at the same time, in order to handle the interrupts of a particular dwc3 controller usb_gadget_handle_interrutps should take controller index as an argument. Hence the API of usb_gadget_handle_interrupts is modified to take controller index as an argument and made the corresponding changes to all the usb_gadget_handle_interrupts calls. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* board: ti: DRA7: added USB initializtion codeKishon Vijay Abraham I2015-04-14-0/+109
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in dra7xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ARM: OMAP5: DRA7xx: Fix misleading comments in mux_data.hLubomir Popov2014-12-04-2/+2
| | | | | | | | | | The comments on the QSPI pad assignments erronously swapped the qspi1_d0 and qspi1_d1 functionality and could cause confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16), and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing comments. Signed-off-by: Lubomir Popov <l-popov@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* arm: omap5: don't enable misc_init_r by defaultFelipe Balbi2014-12-04-12/+0
| | | | | | | | | | Out of all OMAP5-like boards, only one of them needs CONFIG_MISC_INIT_R, so it's best to enable that for that particular board only, instead of enabling for all boards unconditionally. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* OMAP5+: sata/scsi: Implement scsi_init()Roger Quadros2014-10-10-1/+0
| | | | | | | | | | On OMAP platforms, SATA controller provides the SCSI subsystem so implement scsi_init(). Get rid of the unnecessary sata_init() call from dra7xx-evm and omap5-uevm board files. Signed-off-by: Roger Quadros <rogerq@ti.com>
generated by cgit v1.1 at 2024-11-02 08:07:48 +0000