summaryrefslogtreecommitdiff
path: root/board/ti/am335x
Commit message (Collapse)AuthorAgeLines
* am335x:Handle worst case scenario for Errata 1.0.24Steve Kipisz2013-09-20-6/+18
| | | | | | | | | | | | | In Errata 1.0.24, if the board is running at OPP50 and has a warm reset, the boot ROM sets the frequencies for OPP100. This patch attempts to drop the frequencies back to OPP50 as soon as possible in the SPL. Then later the voltages and frequencies up set higher. Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Adapt to current framework] Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: am33xx_spl_board_init function and scale core frequencyTom Rini2013-09-20-0/+134
| | | | | | | | | | | | | | | Add a am33xx_spl_board_init (and enable the PMICs) that we may see, depending on the board we are running on. In all cases, we see if we can rely on the efuse_sma register to tell us the maximum speed. In the case of Beaglebone White, we need to make sure we are on AC power, and are on later than rev A1, and then we can ramp up to the PG1.0 maximum of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we need to rely on the efuse_sma if we are on PG2.1, and the defaults for PG1.0/2.0. Signed-off-by: Tom Rini <trini@ti.com>
* arm, am33xx: add defines for gmii_sel_register bitsHeiko Schocher2013-08-28-5/+1
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x_evm: Update README for customizationTom Rini2013-08-28-1/+27
| | | | | | | | As this is a reference platform, update the README to note which IP blocks are required for use due to design choices of the reference rather than required by the SoC itself. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Stop using PHYS_DRAM_1 defineTom Rini2013-08-15-1/+1
| | | | | | | | | We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1 in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and then using that name in code. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: AM33xx: Move s_init to a common placeHeiko Schocher2013-08-15-67/+32
| | | | | | | | | | | | s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup clocks layerLokesh Vutla2013-08-15-7/+6
| | | | | | | | | | | Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup dplls dataLokesh Vutla2013-08-15-0/+27
| | | | | | | | | | | | | Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* board/ti/am335x/README: Document NOR programmingTom Rini2013-07-30-0/+23
| | | | | | | The Beaglebone White may be populated with a memory cape that has a NOR module. Document how to program it. Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add support to boot from NOR.Steve Kipisz2013-07-30-7/+151
| | | | | | | | | | | | | | | | | | NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR. We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c with TI81xx checks as at this time U-Boot does not discard unused sections in the main build and this code relies on functions specific to (and only provided in) ti81xx-related code. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add support for the NOR module on the memory capeSteve Kipisz2013-07-30-0/+66
| | | | | | | | | | | This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Clean up config changes slightly] Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Rework board_is_foo() checksTom Rini2013-07-30-58/+63
| | | | | | | | | | We rework the various board_is_foo() checks to take a pointer to struct am335x_baseboard_id rather than using a local copy in board.c. This allows us to make use of the same checks in mux.c as well as fixing problems when this code could be running from read-only memory. Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
* board/ti/am335x/README: Document NAND programmingTom Rini2013-07-30-0/+24
| | | | | | | The AM335x GP EVM ships with NAND. Document programming of the chip including the redundant locations that the ROM will check. Signed-off-by: Tom Rini <trini@ti.com>
* drivers: net: cpsw: remove hard coding bd ram for cpswMugunthan V N2013-07-26-0/+1
| | | | | | | BD ram address may vary in various SOC, so removing the hardcoding and passing the same information through platform data Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x_evm: Add basic READMETom Rini2013-07-26-0/+113
| | | | | | | | | Add a README for the family of boards the am335x_evm covers, and include instructions on preparing and using falcon mode, for various media. Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-27/+3
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-22-38/+1
|\
| * arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-22/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
| * arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-16/+0
| | | | | | | | | | | | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-13-0/+2
|\ \ | |/ | | | | | | | | | | | | | | Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini <trini@ti.com>
| * am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes2013-06-10-0/+2
| | | | | | | | | | | | | | | | driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
* | am335x: enable falcon boot mode for mmc (raw and fat) and nandPeter Korsgaard2013-06-07-0/+9
|/ | | | | | | | | | | | | | | | Jump into full u-boot mode if a 'c' character is received on the uart. We need to adjust the spl bss/malloc area to not overlap with the loadaddr of the kernel (sdram + 32k), so move it past u-boot instead. For raw mmc, we store the kernel parameter area in the free space after the MBR (if used). For nand, we use the last sector of the partition reserved for u-boot. This also enables the spl command in the full u-boot so the kernel parameter area snapshot can be created. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
* am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini2013-06-05-0/+9
| | | | | | | | | | | We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* am335x: Update timings for the beaglebone againTom Rini2013-04-10-1/+1
| | | | | | | | After further testing we can run DDR at 400MHz so update the timings again. Tested-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Add better timings for the new BeagleBoard DDR3 partTom Rini2013-03-24-1/+38
| | | | | Tested-by: Rao Bodapati <rao@circuitco.com> Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: refactor emif4/ddr to support multiple EMIF instancesMatt Porter2013-03-24-3/+3
| | | | | | | | | | The AM33xx emif4/ddr support closely matches what is need to support TI814x except that TI814x has two EMIF instances. Refactor all the emif4 helper calls and the config_ddr() init function to use an additional instance number argument. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: convert defines from am33xx-specific to generic namesMatt Porter2013-03-24-3/+3
| | | | | | | | Eliminate AM33xx specific names to prepare for TI814x support within AM33xx-land. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am335x: Enable DDR PHY dynamic power down bit for DDR3 boardsVaibhav Hiremath2013-03-24-2/+4
| | | | | | | | | | | | | Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am335x_evm: Add am335x_evm_usbspl build targetTom Rini2013-03-08-1/+1
| | | | | | | We add USB (RNDIS gadget) SPL support as a separate target. We need to pull out YMODEM support in order to be a small enough target binary. Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: enable support for booting via USBIlya Yanok2013-02-18-17/+21
| | | | | | | | | | | | | | | This adds necessary config options and a new build target, am335x_evm_usbspl, to enable usb booting and fixes board_eth_init() function to take into account that we may have USB ether support in SPL now. This uses the same MAC for both cpsw and USB, in order to match ROM behavior. The usbspl build target does not contain UART SPL, CPSW SPL or extra environment settings, so that we may fit within our binary size constraint. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Signed-off-by: Tom Rini <trini@ti.com>
* am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SKTom Rini2013-02-12-0/+27
| | | | | | | | In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini@ti.com>
* Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance2013-02-07-0/+41
| | | | | | | | | | | | | | AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
* am335x: display msg when reading MAC from efuseLars Poeschel2013-02-07-1/+1
| | | | | | | | When ethaddr is not set in environment the MAC address is read from efuse. The message was only printed in debug case, but this message could be of interest for the ordinary user, so printf it. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-1/+25
|\ | | | | | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * am335x: disable internal delay for RGMII modeYegor Yefremov2012-12-10-1/+1
| | | | | | | | | | | | | | According to errata the AM335x device does not support internal delay mode, so RGMII1_IDMODE and RGMII2_IDMODE must be set to 1. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
| * am335x_evm: enable NAND supportIlya Yanok2012-12-10-0/+2
| | | | | | | | | | | | Enable NAND support for AM335X boards. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * am335x_evm: add nand pinmux definitionIlya Yanok2012-12-10-0/+22
| | | | | | | | | | | | | | Add NAND pins mux settings for AM335X devices. Enable NAND pins for AM335X EVM board. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | am335x_evm: enable both musb gadget and hostIlya Yanok2012-11-20-2/+21
|/ | | | | | | Enable musb gadget in Ethernet mode on port 0 and musb host on port1. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-1/+108
|\
| * am335x: add initial AM335x IDK board supportMatthias Fuchs2012-11-02-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the am335x_evm board for the AM335x IDK. The IDK board uses MII for the ethernet phy (same as Beaglebone board) and MMC0 for storage (but without card detect line). The IDK uses UART3 for console. So u-boot must be build with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for the am335x_evm_uart3 board configuration as introduced by Andrew Bradfords recent patch series "am33xx: Enable UART {1,2,3,4,5}...". When using the IDK with console on UART0, those patches are not required. In this case the board slightly needs to be modified. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
| * am335x: add mux config for DDR3 version of beagleboneKoen Kooi2012-10-30-0/+6
| | | | | | | | | | | | | | | | | | | | This fixes the following boothang in SPL: Unknown board, cannot configure pinmux.### ERROR ### Please RESET the board ### Future commits will add pinmuxes for more on-board peripherals. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
| * am33xx: Enable UART{1,2,3,4,5} pin-muxAndrew Bradford2012-10-25-0/+76
| | | | | | | | | | | | | | If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232 cape or on the am335x_evm daughterboard, enable the proper pin-muxing. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
* | am335x_evm: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportTom Rini2012-11-02-0/+20
|/ | | | | | | | | | We add CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and CONFIG_BOARD_LATE_INIT to set the variables and then fdtfile and findfdt to make us of this. It is now possible to do 'run findfdt' to have fdtfile be set to the value of the dtb file to load for the board we are running on. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbersPeter Korsgaard2012-10-25-50/+62
| | | | | | So other parts can be added. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
* am33xx: support board specific ddr settingsPeter Korsgaard2012-10-25-12/+77
| | | | | | | | | Move the hardcoded ddr2/ddr3 settings for the ti boards to board code, so other boards can use different types/timings. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make apply with rtc32k_enable() in the file] Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: move generic parts of pinmux handling out from board/ti/am335xPeter Korsgaard2012-10-25-248/+1
| | | | | | So they are available for other boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
* am33xx: move ti i2c baseboard header handling to board/ti/am335x/Peter Korsgaard2012-10-25-0/+350
| | | | | | | | | The i2c header is specific to ti(-derived) boards, and not generic for all am335x boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make re-apply with rtc32k_enable() applied] Signed-off-by: Tom Rini <trini@ti.com>
* am335x evm: Enable support for spi0Tom Rini2012-09-01-0/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* am335x evm: Enable MMC1 pinmuxTom Rini2012-09-01-0/+16
| | | | | | | MMC1 is available in profile 2 on the GP EVM and is exposed on the expansion header on beaglebone. Signed-off-by: Tom Rini <trini@ti.com>
* am335x evm: Initial support for AM335x GP EVM ProfilesTom Rini2012-09-01-4/+42
| | | | | | | | | The AM335x GP EVM can have one of 8 different profiles selected. Each profile has a different set of peripherals and requires different pinmux configurations that conflict with other profiles. i2c1 is an example of a conflicted mux currently. Signed-off-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-11-06 18:57:56 +0000