summaryrefslogtreecommitdiff
path: root/board/sr1500
Commit message (Collapse)AuthorAgeLines
* arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1Chin Liang See2016-10-27-0/+3
| | | | | | | | | | Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Drop the board boilerplateMarek Vasut2015-12-20-17/+0
| | | | | | | | Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-07-0/+1362
The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>