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* ARM: tegra: p2371-2180: import latest pinmuxStephen Warren2015-10-02-21/+35
| | | | | | | | | | In order to avoid any assumptions about any device connected to P2371-2180's expansion connector, the latest pinmux spreadsheet configures all muxable pins on that connector to be GPIO inputs, with on-chip pulls where appropriate. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Add p2371-2180 boardStephen Warren2015-09-16-0/+342
| | | | | | | | | | P2371-2180 is a P2180 CPU board married to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA, PCIe, and two GPIO expansion headers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Add p2371-0000 boardStephen Warren2015-08-06-0/+345
| | | | | | | | | | | P2371-0000 is a P2581 or P2530 CPU board married to a P2595 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA, a GPIO expansion header, and an analog audio jack. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Add e2220-1170 boardStephen Warren2015-08-06-0/+354
| | | | | | | | | E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various expansion modules. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable GPU DT node when appropriateAlexandre Courbot2015-08-06-0/+23
| | | | | | | | | | | | | | | | T124/210 requires some specific configuration (VPR setup) to be performed by the bootloader before the GPU can be used. For this reason, the GPU node in the device tree is disabled by default. This patch enables the node if U-boot has performed VPR configuration. Boards enabled by this patch are T124's Jetson TK1 and Venice2 and T210's P2571. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add comment re: autogeneration to pinmux headersStephen Warren2015-08-06-0/+32
| | | | | | | | | | Add a comment block to the top of each generated Tegra pinmux header file indicating that the file was auto-generated, should not be manually edited, and with a pointer to the tool and command used to generate it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* T210: P2571: Turn CPU fan onTom Warren2015-08-05-0/+12
| | | | | | | | CPU board (E2530) has a fan - turn it on via GPIO to keep the SoC cool. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* T210: P2571: Enable SD-card power via PMIC LDO2Tom Warren2015-08-05-87/+24
| | | | | | | | This was done in the 32-bit AVP loader (SPL) but is board-specific so should be moved to the CPU portion. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* T210: Add support for 64-bit T210-based P2571 boardTom Warren2015-07-28-0/+443
| | | | | | | | | | | Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with a 32-bit AVP loader). Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nyan-big: Allow TPM on I2CSimon Glass2015-07-27-4/+4
| | | | | | | | | | | Enable the I2C3 pins so that the TPM can be used. Note: There is an DP change also, caused by running board-to-uboot.py script in the latest tegra-pinmux-script tree. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Replace 'Norrin' with 'Nyan-big' and fix typoSimon Glass2015-06-09-1/+1
| | | | | | | | With the rename the MAINTAINER file was not updated. Fix it and the 'Chrombook' typo in Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nyan-big: Add additional clock and kernel initSimon Glass2015-06-09-0/+69
| | | | | | | | | | We need to turn on all audio-related clocks for the Chrome OS kernel to boot. Otherwise it will hang when trying to enable audio. Also for Linux set up graphics driver video protection. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move NVIDIA common files to arch/arm/mach-tegraMasahiro Yamada2015-05-13-331/+0
| | | | | | | | | | | | | | | | | | | | | All the Tegra boards borrow the files from board/nvidia/common/ directory, i.e., board/nvidia/common/* are not vendor-common files, but SoC-common files. Move NVIDIA common files to arch/arm/mach-tegra/ to clean up Makefiles. As arch/arm/mach-tegra/board.c already exists, this commit renames board/nvidia/common/board.c to arch/arm/mach-tegra/board2.c, expecting they will be consolidated as a second step. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nyan-big: Add LCD PMIC init and board IDSimon Glass2015-05-13-1/+33
| | | | | | | | Add required setup for the LCD display, and a function to provide the board ID. This requires GPIOs to be available prior to relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add support for setting up a as3722 PMICSimon Glass2015-05-13-0/+7
| | | | | | | Add support for this PMIC which is used on some Tegra124 boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Provide a function to allow LCD PMIC setupSimon Glass2015-05-13-0/+10
| | | | | | | Some LCDs require a PMIC to be set up - add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add a board ID functionSimon Glass2015-05-13-1/+11
| | | | | | | Add a way of displaying a numeric board ID on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move checkboard() into the board codeSimon Glass2015-05-13-4/+9
| | | | | | | | This is only used by Nvidia boards, so move it into nvidia/common to simplify things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: seaboard: Correct the gpio_request() callSimon Glass2015-03-30-1/+1
| | | | | | | | | Requesting a GPIO without a name is not supposed anymore. This causes the request to fail. Add a name so that the serial console works on seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-03-10-169/+145
|\ | | | | | | | | | | | | Conflicts: README Signed-off-by: Tom Rini <trini@konsulko.com>
| * ARM: tegra: import latest Jetson TK1 pinmuxStephen Warren2015-03-04-169/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Syseng has revamped the Jetson TK1 pinmux spreadsheet, basing the content completely on correct configuration for the board/schematic, rather than the previous version which was based on the bare minimum changes relative to another reference board. The new spreadsheet sets TRISTATE for any input-only pins. This only works correctly if the global CLAMP bit is not set, so the Jetson TK1 board code has been adjusted accordingly. Apparently syseng have changed their mind since the previous advice that this needed to be set:-/ This content comes from Jetson_TK1_customer_pinmux.xlsm (v09) downloaded from https://developer.nvidia.com/hardware-design-and-development. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: support running in non-secure modeStephen Warren2015-03-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the CPU is in non-secure (NS) mode (when running U-Boot under a secure monitor), certain actions cannot be taken, since they would need to write to secure-only registers. One example is configuring the ARM architectural timer's CNTFRQ register. We could support this in one of two ways: 1) Compile twice, once for secure mode (in which case anything goes) and once for non-secure mode (in which case certain actions are disabled). This complicates things, since everyone needs to keep track of different U-Boot binaries for different situations. 2) Detect NS mode at run-time, and optionally skip any impossible actions. This has the advantage of a single U-Boot binary working in all cases. (2) is not possible on ARM in general, since there's no architectural way to detect secure-vs-non-secure. However, there is a Tegra-specific way to detect this. This patches uses that feature to detect secure vs. NS mode on Tegra, and uses that to: * Skip the ARM arch timer initialization. * Set/clear an environment variable so that boot scripts can take different action depending on which mode the CPU is in. This might be something like: if CPU is secure: load secure monitor code into RAM. boot secure monitor. secure monitor will restart (a new copy of) U-Boot in NS mode. else: execute normal boot process Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | dm: tegra: Enable driver model in SPL and adjust the GPIO driverSimon Glass2015-03-04-3/+1
|/ | | | | | | | | | | Use the full driver model GPIO and serial drivers in SPL now that these are supported. Since device tree is not available they will use platform data. Remove the special SPL GPIO function as it is no longer needed. This is all in one commit to maintain bisectability. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Provide an offset length parameter where neededSimon Glass2015-01-29-6/+6
| | | | | | | | | | Rather than assuming that the chip offset length is 1, allow it to be provided. This allows chips that don't use the default offset length to be used (at present they are only supported by the command line 'i2c' command which sets the offset length explicitly). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Rename driver model I2C functions to permit compatibilitySimon Glass2015-01-29-12/+12
| | | | | | | | | | | Add a dm_ prefix to driver model I2C functions so that we can keep the old ones around. This is a little unfortunate, but on reflection it is too difficult to change the API. We can undo this rename when most boards and drivers are converted to use driver model for I2C. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: remove redudant information from Kconfig filesMasahiro Yamada2015-01-12-12/+0
| | | | | | | | | - "string" type for SYS_* is defined in arch/Kconfig - SYS_CPU "armv7" has been replaced with "select CPU_V7" - SYS_SOC "tegra124" is already defined in tegra124/Kconfig Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Bo Shen <voice.shen@atmel.com>
* ARM: tegra: Enable PCIe on Jetson TK1Thierry Reding2014-12-18-0/+52
| | | | | | | | | | The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes the second root port to a miniPCIe slot. Enable the PCIe controller and the network driver to allow the device to boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Enable PCIe on CardhuThierry Reding2014-12-18-0/+52
| | | | | | | | | | | The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC is available on the dock over the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Implement XUSB pad controllerThierry Reding2014-12-18-0/+3
| | | | | | | | | | | | | | | This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: i2c: tegra: Convert to driver modelSimon Glass2014-12-11-24/+43
| | | | | | | | | | | | | | | | | | | | | | This converts all Tegra boards over to use driver model for I2C. The driver is adjusted to use driver model and the following obsolete CONFIGs are removed: - CONFIG_SYS_I2C_INIT_BOARD - CONFIG_I2C_MULTI_BUS - CONFIG_SYS_MAX_I2C_BUS - CONFIG_SYS_I2C_SPEED - CONFIG_SYS_I2C This has been tested on: - trimslice (no I2C) - beaver - Jetson-TK1 It has not been tested on Tegra 114 as I don't have that board. Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: tegra: Add support for nyan-big boardAllen Martin2014-12-11-1/+354
| | | | | | | | | | | | | | | | | | | Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but it has a different panel, the sdcard cd and wp sense are flipped, and it has a different revision of the AS3722 PMIC. This is the Acer Chromebook 13 CB5-311-T7NN (13.3-inch HD, NVIDIA Tegra K1, 2GB). The display is not currently supported, so it should boot on other nyan-based Chromebooks also, but only the device tree for nyan-big is provided here. The device tree file is from Linux but with features removed which are unlikely to be supported in U-Boot soon (regulators, pinmux). Also the addresses are updated to 32-bit. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> (rebase, change to 'nyan-big', fix pinmux that resets nyan-big)
* dm: tegra: Add platform data for the GPIO driverSimon Glass2014-11-21-0/+8
| | | | | | | | Add platform data for the GPIO driver. It doesn't need to contain anything since the GPIO driver will actually use information from the CONFIGs for now. This merely serves to ensure that the GPIO driver is bound. Signed-off-by: Simon Glass <sjg@chromium.org>
* tegra: make local functions staticJeroen Hofstee2014-10-25-36/+9
| | | | Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2014-10-23-0/+5
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| * ARM: tegra: add PCIe-related pins to the Jetson TK1 pinmux tablesStephen Warren2014-10-22-0/+5
| | | | | | | | | | | | | | | | | | | | This pinmux tables currently omit any configuration for PCIe clk_req, wake, and rst pins, which in turn causes intermittent failures in U-Boot's PCIe support. Import an updated version of the pinmux tables which rectifies this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | dm: tegra: spi: Convert to driver modelSimon Glass2014-10-22-2/+1
|/ | | | | | | | | | | | | | This converts the Tegra SPI drivers to use driver model. This is tested on: - Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore (not tested on Tegra124) Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-27/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* tegra: Convert tegra GPIO driver to use driver modelSimon Glass2014-09-10-1/+1
| | | | | | | | | | | | | | | | This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature. The implementation uses a top-level GPIO device (which has no actual GPIOS). Under this all the banks are created as separate GPIO devices. The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc. Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code. Signed-off-by: Simon Glass <sjg@chromium.org>
* tegra: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-81/+0
| | | | | | | | | | | | | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Tegra board select menu to tegra/Kconfig. Insert the Tegra SoC select menu between the arch select and the board select. Architecture select |-- Tegra Platform (Tegra) |- Tegra SoC select (Tegra20 / 30 / 114 / 124) |- Board select Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="tegra*") and always "select" CONFIG_SPL as follows: config TEGRA bool select SPL Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* ARM: tegra: remove custom define for Jetson TK1Stephen Warren2014-08-19-1/+1
| | | | | | | | | Now that Kconfig has a per-board option, we can use that directly rather than inventing a custom define for the AS3722 code to determine which board it's being built for. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+57
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: tegra: Venice2 pinmux spreadsheet updatesStephen Warren2014-05-13-5/+9
| | | | | | | | The Venice2 pinmux spreadsheet was updated to fix a few issues. Import those changes into the U-Boot pinmux initialization tables. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: update Venice2 pinmuxStephen Warren2014-05-13-316/+266
| | | | | | | | | | This re-imports the entire Venice2 pinmux data from the board's master spreadsheet, and makes use of the new IO clamping GPIO initialization table features. This makes the board port fully compliant with the required HW-defined pinmux initialization sequence. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: clamp inputs on Jetson TK1Stephen Warren2014-05-13-0/+2
| | | | | | | | | The HW-defined procedure for booting Tegra requires that CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux. Modify the Jetson TK1 board to do this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: make use of GPIO init table on Jetson TK1Stephen Warren2014-05-13-82/+178
| | | | | | | | | | | | The HW-defined procedure for booting Tegra requires that some pins be set up as GPIOs immediately at boot in order to avoid glitches on those pins, when the pinmux is programmed. This patch implements this procedure for Jetson TK1. For pins which are to be used as GPIOs, the pinmux mux function need not be programmed, so the pinmux table is also adjusted. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* usb: tegra: combine header fileStefan Agner2014-04-17-1/+0
| | | | | | | | | | | Combine the Tegra USB header file into one header file for all SoCs. Use ifdef to account for the difference, especially Tegra20 is quite different from newer SoCs. This avoids duplication, mainly for Tegra30 and newer devices. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add Jetson TK1 boardStephen Warren2014-04-17-0/+263
| | | | | | | | Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra124 pinmux cleanupStephen Warren2014-04-17-167/+167
| | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra124_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. There are differences in the set of drive groups. I have validated this against the TRM. There are differences order of pin definitions in pinmux.c; these previously had significant mismatches with the correct order:-( I adjusted a few entries in pinmux-config-venice2.h since the set of legal functions for some pins was updated to match the TRM. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra114 pinmux cleanupStephen Warren2014-04-17-180/+180
| | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-06 06:51:02 +0000