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* tegra: Allow boards to perform early GPIO setupThierry Reding2012-07-09-0/+8
| | | | | | | | | The new gpio_early_init() function, which does nothing by default, can be overridden by boards to configure GPIOs at an early stage. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*Tom Warren2012-07-07-5/+5
| | | | | | | | In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* spi: tegra2: rename tegra2_spi.* to tegra_spi.*Tom Warren2012-07-07-1/+1
| | | | | | | | In anticipation of Tegra3 support, start removing/renaming Tegra2-specific files. No functional changes (yet). Also updated copyright to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: ventana: add own device tree, enable USBStephen Warren2012-07-07-0/+57
| | | | | | | | | | Add a device tree for Ventana; the Seaboard file no longer represents the HW present on Ventana. Enable USB on Ventana. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: harmony: add device tree supportStephen Warren2012-07-07-0/+57
| | | | | | | ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Whistler board supportStephen Warren2012-07-07-0/+231
| | | | | | | | | | | | | | | | | | | Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* spi: Tegra2: Seaboard: fix UART corruption during SPI transactionsTom Warren2012-07-07-20/+7
| | | | | | | | | | | Simon Glass's proposal to fix this on Seaboard was NAK'd, so I removed his NS16550 references and added a small delay before SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes and saw no corruption (crc's matched) and no spurious comm chars. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
* tegra: fdt: Add keyboard definitions for SeaboardAnton Staff2012-05-15-0/+27
| | | | | | | | Seaboard uses a QUERTY keyboard. We add key codes for this to enable key scanning to work. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add EMC data for Tegra2 SeaboardSimon Glass2012-05-15-0/+37
| | | | | | | | | | | | This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add EMC settings for SeaboardJimmy Zhang2012-05-15-2/+95
| | | | | | | | | Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Turn off power detect in board initWei Ni2012-05-15-0/+18
| | | | | | | | | | | Tegra core power rail has leakage voltage around 0.2V while system in suspend mode. The source of the leakage should be coming from PMC power detect logic for IO rails power detection. That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0' to PWR_DET (APBDEV_PMC_PWR_DET_0). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Set up warmboot code on Nvidia boardsSimon Glass2012-05-15-0/+6
| | | | | | | Call the function to put warmboot boot in a suitable place for resume. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Set up PMU for Nvidia boardsSimon Glass2012-05-15-0/+6
| | | | | | | Adjust PMU to permit maximum frequency operation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: i2c: Select I2C ordering for SeaboardSimon Glass2012-03-29-0/+18
| | | | | | | Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: i2c: Initialise I2C on Nvidia boardsSimon Glass2012-03-29-0/+7
| | | | | | | | | This enables I2C on all Nvidia boards including Seaboard and Harmony. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: usb: Add USB support to nvidia boardsSimon Glass2012-03-29-0/+24
| | | | | | | | | | | | | | | | | | This adds basic USB support for port 0. The other port is not supported yet. Tegra2 (SeaBoard) # usb start (Re)start USB... USB: Register 10011 NbrPorts 1 USB EHCI 1.00 scanning bus for devices... 5 USB Device(s) found scanning bus for storage devices... 1 Storage Device(s) found Tegra2 (SeaBoard) # ext2load usb 0:3 10000000 /boot/vmlinuz Loading file "/boot/vmlinuz" from usb device 0:3 (ROOT-A) 2932976 bytes read Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: usb: fdt: Add USB definitions for Tegra2 SeaboardSimon Glass2012-03-29-0/+11
| | | | | | | | We set up two USB ports, one of which can be host or device. For some reason the kernel version does enable both ports. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add clock bindings for Tegra2 SeaboardSimon Glass2012-03-29-0/+27
| | | | | | | | | | | Add the definition of the oscillator clock frequency and the 32KHz clock. The latter is provided by a PMIC on I2C which we don't actually use at present, but we expect this definition to be used in the kernel and want to keep our .dts the same. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add device tree file for Tegra2 Seaboard from kernelSimon Glass2012-03-29-0/+36
| | | | | | | | This was taken from commit b48c54e2 at: git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use funcmux for MMC on seaboardSimon Glass2012-02-12-17/+4
| | | | | | | Use the new funcmux_select() feature to set up the MMC pin mux. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use funcmux for MMC on harmonySimon Glass2012-02-12-15/+4
| | | | | | | Use the new funcmux_select() feature to set up the MMC pin mux. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Optimize out-of-tree build for Ventana.Thierry Reding2011-12-24-2/+1
| | | | | | | | | As proposed by Mike Frysinger, mkdir can take more than one argument. Instead of spawning two processes, create both the common and seaboard directories in one go. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move boards over to use arch-level board UART functionSimon Glass2011-12-24-74/+2
| | | | | | | | | Now that we can set up the UART in common tegra code, make the boards use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move clock_early_init() to arch_cpu_init()Simon Glass2011-12-24-3/+0
| | | | | | | | | The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move cpu_init_cp15() to arch_cpu_init()Simon Glass2011-12-24-3/+0
| | | | | | | | | This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/masterTom Warren2011-12-24-3/+1
| | | | | | | Seaboard changes have removed the need for common/board.o in the Makefile. Propagate this change to the other Tegra2 builds. Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-3/+2
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Plumb in SPI/UART switch codeSimon Glass2011-12-24-0/+12
| | | | | | | | | | | | | | | On Seaboard the UART and SPI interfere with each other. This causes the UART to receive spurious zero bytes after SPI transactions and also means that SPI can corrupt a few output characters when it starts up if they are still in the UART buffer. This updates the board to use the SPI/UART switch to avoid the problem. For now this feature is turned off since it needs changes to the NS16550 UART to operate. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-24-1/+185
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+4
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* tegra2: Add UARTB supportSimon Glass2011-12-24-0/+10
| | | | | | | UARTB is used on some boards, so support it here. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Tidy UART selectionSimon Glass2011-12-24-23/+34
| | | | | | | | UART selection is done with a lot of #ifdefs. This cleans things up a little. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix out-of-tree build for Ventana.Thierry Reding2011-12-22-0/+1
| | | | | | | | | | Since Ventana is derived from Seaboard and requires seaboard.c to build, make sure board/nvidia/seaboard is created in the build tree. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Wolfgang Denk <wd@denx.de>
* tegra2: Enable instruction cacheSimon Glass2011-12-09-0/+3
| | | | | | | | | Since low-level init is skipped, the instruction cache is never enabled on Tegra2. This explicitly calls this initialization as soon as the A9 is initialized. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add arch_cpu_init() to fire up Cortex-A9Simon Glass2011-12-09-4/+0
| | | | | | | | | | | | | We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Use new GPIO APIs in gpio_config_uart()Stephen Warren2011-12-09-16/+2
| | | | | | | | | | | | | | | ... rather than open-coding the register accesses. However, gpio_request() typically stores the "label" parameter in a global data structure. This causes problems when called from gpio_config_uart(), since the code is running before relocation. To solve this, pass a NULL string to gpio_request(), and modify gpio_request() not to touch the string if it's NULL. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add support for VentanaStephen Warren2011-12-09-2/+58
| | | | | | | | | | | | | | Ventana is a board which is very similar to Seaboard. Support it by re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals. v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets. v6: Make gpio_config_uart_seaboard() static. v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so he asked me to add myself for this board. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Modify MMC driver to handle power and cd GPIOsStephen Warren2011-12-09-57/+6
| | | | | | | | | | | | | | | | | | | | | | | Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and modify that function to perform all required GPIO initialization. This removes the need for board files to perform these operations. Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which GPIOs to use. Update affected call-sites in seaboard.c and harmony.c. Note that this change should make all SD ports work on Harmony, since the required GPIO setup is now being performed. v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change. Remove prototype of gpio_config_mmc() from board.h Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move board_mmc_init into board filesStephen Warren2011-12-09-52/+109
| | | | | | | | | | | | | | | | | | | | For Seaboard, this is mostly a cut/paste of board_mmc_init() and pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some missing pinmux_tristate_disable calls for the GPIOs. For Harmony, those functions were modified to configure SDMMC2 (index 2) instead of SDMMC3 (index 1), since that's what is present on the board. However, harmony.c is still missing the required GPIO setup, so neither port is likely to function correctly yet. This will be fixed in the next change. v4: Include board.h to prototype tegra2_mmc_init(). Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move MMC clock initialization into MMC driverStephen Warren2011-11-03-12/+1
| | | | | | | | | | | This centralizes knowledge of MMC clocking into the MMC driver. This also removes clock setup from the board files, which will simplify later changes that modify the Harmony board to support the correct set of MMC controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* tegra2: Enable MMC for SeaboardTom Warren2011-10-27-13/+62
| | | | | | | | This adds the required GPIO and pinmux configuration to make eMMC / SD work on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more pinmux functionsSimon Glass2011-10-27-31/+11
| | | | | | | | | | | | | This adds support for changing pinmux functions of pin groups. This is done by defining a PMUX_FUNC_... enum which can be used to select the function for each group using pinmux_set_func(). It is also possible to enable pullup/pulldown, and the existing tristate functionality is retained. Also provided is a means of configuring a list of pingroups by providing a configuration table to pinmux_config_table(). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename PIN_ to PINGRP_Simon Glass2011-10-27-9/+9
| | | | | | | | | | | The pin groupings are better named PINGRP, since on Tegra2 they refer to multiple pins. Sorry about this, but better to get it right now when there is only a small amount of code affected. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more clock functionsSimon Glass2011-10-27-81/+24
| | | | | | | | | | | | | This adds most of the clock functions required by board and driver code: -query and adjust peripheral clocks -query and adjust PLLs -reset and enable control These functions are plumbed in as required. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Clean up board code a littleSimon Glass2011-10-27-48/+20
| | | | | | | | | | | | This removes clock_init() and pinmux_init() which are names better suited to those respective modules. By moving board_init_f() to the bottom of the file we can remove the need for so many functions in the board.h header file. The only clock/pinmux/gpio init we need to do prior to relocation is for the UART. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename CLOCK_PLL_ID to CLOCK_IDSimon Glass2011-10-27-1/+1
| | | | | | | | | | | Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the code now deals with both PLL clocks and source clocks. This also tidied up the assert() to match the one sent upstream, and fixes an error in the PWM id. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* build: add missing $(AR)->$(cmd_link_o_target) updateMike Frysinger2011-10-22-2/+2
| | | | | | | | | Seems people fixed their files to use libfoo.o, but didn't actually update the creation targets to use $(cmd_link_o_target). Update the rest of the Makefile's found with grep. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Simon Glass <sjg@chromium.org>
* punt unused clean/distclean targetsMike Frysinger2011-10-15-12/+0
| | | | | | | | | | The top level Makefile does not do any recursion into subdirs when cleaning, so these clean/distclean targets in random arch/board dirs never get used. Punt them all. MAKEALL didn't report any errors related to this that I could see. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* arm: tegra2: fix out-of-tree buildChe-liang Chiou2011-09-07-0/+8
| | | | | | | | | | | | | | | The out-of-tree build fails because the Makefiles in question depend on source files of another directory but do not explicitly mkdir that directory. As a matter of fact, other Makefiles under board/*/ directory that refer to source files under another directory explicitly call mkdir. This patch adds explicit mkdir's to the Makefiles in question, and verifies that out-of-tree build is working. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Tegra2: Use clock and pinmux functions to simplify codeSimon Glass2011-09-04-6/+6
| | | | Signed-off-by: Simon Glass <sjg@chromium.org>
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