summaryrefslogtreecommitdiff
path: root/board/nvidia
Commit message (Collapse)AuthorAgeLines
* Tegra114: Add generic Tegra114 build supportTom Warren2013-02-11-1/+1
| | | | | | | This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+13
| | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add SPI SLINK driverAllen Martin2013-02-11-1/+2
| | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+5
| | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: sort dts filesAllen Martin2013-01-17-70/+58
| | | | | | | | | | | | | | Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: remove clocks nodesAllen Martin2013-01-17-59/+0
| | | | | | | These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: remove IRDA pinmux synonymAllen Martin2013-01-16-2/+2
| | | | | | | | | IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this synonym and replace with UARTB to disambiguate. Signed-off-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: fdt: Update DT files with I2C info for T30/CardhuTom Warren2013-01-16-0/+41
| | | | | | | | | | | Note that T30 does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but DVC_I2C is still used to designate the controller intended for power control (PWR_I2C in the schematics). On Cardhu, it's used to access the PMU and EEPROM, as well as the audio codec, temp sensor, and fuel gauge devices from the OS. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: Add/enable Cardhu build (T30 reference board)Tom Warren2013-01-16-0/+563
| | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. include/configs/tegra-common.h now holds common config options for Tegra SoCs. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-3/+14
| | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra30: Cardhu: Add DT filesTom Warren2013-01-16-0/+14
| | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* tegra: display: add board pinmuxMarc Dietrich2013-01-16-0/+7
| | | | | | | | Boards may require a different pinmux setup for DISPALY than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable 8-bit SD slots in board filesStephen Warren2012-11-19-6/+4
| | | | | | | | | | | | | | | | | | | | Harmony contains an SD slot with all 8 bits routed. This allows plugging in an eMMC-chip-in-SD-form-factor. Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits hooked up. Now that the U-Boot eMMC code fully supports 8-bit operation, initialize those ports as 8-bit instead of 4-bit to improve performance. Whistler was already registering its ports as 8-bit. TrimSlice doesn't have any 8-bit ports. I don't have any Avionic Design boards nor the Colibri board to test with. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add LCD definitions for SeaboardSimon Glass2012-11-19-0/+33
| | | | | | | | The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled by one of the PWMs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add LCD support to Nvidia boardsSimon Glass2012-11-19-0/+19
| | | | | | | Add calls to the LCD driver from Nvidia board code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add support for PWMSimon Glass2012-11-19-0/+5
| | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: don't request GPIO from Seaboard's SPLStephen Warren2012-10-29-10/+4
| | | | | | | | | | | | | | | | Seaboard has a GPIO that switches an external mux between Tegra's debug UART and SPI flash. This is initialized from the SPL so that SPL debug output can be seen. Simplify the code that does this, and don't actually request the GPIO in the SPL; just program it. This saves ~4.5K from the size of the SPL, mostly BSS due to the large gpio_names[] table that is no longer required. This makes Seaboard's SPL fit within the current max size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: select between Seaboard/Ventana at compile timeStephen Warren2012-10-29-3/+1
| | | | | | | | | | | | | | Seaboard and Ventana are very similar boards, and so share the seaboard.c board file. The one difference needed so far is detected at run-time by calling machine_is_ventana(). This bloats the Ventana build with code that is never used. Switch to detecting Ventana at compile time to remove bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit within the max size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Whistler: remove unused USB aliasStephen Warren2012-10-29-1/+4
| | | | | | | | | | | Port USB1 on Whistler is intended as a device port for USB recovery. Whistler's DT currently contains an alias for this USB port, even though Whistler's config doesn't enable multiple USB controllers, so the alias is unused. Remove the unused alias for consistency for now. Similar, explicitly disable the port in the device tree too. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Harmony: enable ULPI USB portStephen Warren2012-10-29-1/+11
| | | | | | | | | | | | The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: move common features to a common makefileMarc Dietrich2012-10-29-3/+5
| | | | | | | | | | | | | | | | | | | For Non-Nvidia boards to include newly added features (like emc clock scaling) it would be necessary to add each feature to their own board Makefile. This is because currently the top Makefile automaticly includes these features only for Nvidia boards. This patch adds a simple Makefile include so all new features become available for non-Nvidia board vendors. Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Lucas Stach <dev@lynxeye.de> Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nand: add board pinmuxLucas Stach2012-10-15-0/+12
| | | | | | | | Boards may require a different pinmux setup for NAND than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: clean up board include hellLucas Stach2012-10-15-39/+1
| | | | | | | | | | The prototypes used in board files were all scattered out, which lead to code duplication between SPL and normal U-Boot and some prototypes not actually being used. Consolidate this in a common board header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rework UART GPIO handlingLucas Stach2012-10-15-19/+9
| | | | | | | | | | | | | | | | | | | | Rename board provided gpio_config_uart() to gpio_early_init_uart() as it does the same thing as the equally called function provided by the uart-switch code. This allows to simply call this function in early board init whether or not we are building with CONFIG_UART_SWITCH defined. Also provide a weak symbol for this function, to avoid the need to provide this function for boards that don't need any fixup. This patch supersedes the earlier posted "tegra: convert gpio_config_uart to weak symbol". Build tested with MAKEALL -s tegra20 Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-15-22/+21
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-10/+10
| | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: fix Ventana standalone buildStephen Warren2012-09-07-2/+0
| | | | | | | | | | | | | | | | | | | | | | | Ventana always pulls in files from the Seaboard directory, so needs to mkdir $(obj)../seaboard unconditionally. This fixes: git clean -f -d -x ./MAKEALL ventana "MAKEALL -s tegra20" passes without this change, because Seaboard happens to be built before Ventana, and hence the directory has already been created. I believe the mkdir is only needed for out-of-tree builds, since the seaboard directory is part of the source tree. However, since we always build an SPL for Tegra now, which I believe is effectively an out-of-tree build, we will always need this at some time. The overhead of just uncondtionally executing the mkdir is minimal, and simplifies the Makefile, since we don't need to code up the exact minimal condition to execute the mkdir. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: remove redundant mkdirs from board MakefilesStephen Warren2012-09-07-13/+1
| | | | | | | | None of harmony, seaboard, ventana, whistler directly build files from ../common/, so there's no need to mkdir the obj directory for such files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: enable NAND on HarmonyStephen Warren2012-09-07-0/+10
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add NAND definitions to fdtSimon Glass2012-09-07-0/+10
| | | | | | | | Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: move SDRAM param save to later in bootAllen Martin2012-09-01-0/+3
| | | | | | | | | | | | Move warmboot_save_sdram_params() to later in the boot sequence. This code relies on devicetree to get the address of the memory controller and with upcoming changes for SPL boot it gets called early in the boot process when devicetree is not initialized yet. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: remove timer_init from SPL buildAllen Martin2012-09-01-0/+2
| | | | | | | | | | Don't use timer_init from tegra board.c. This comes out of arm720t for the SPL build. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-20/+20
| | | | | | | | | | This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add pin_mux_spi() board initialization functionStephen Warren2012-07-09-0/+7
| | | | | | | | Boards can override this to set up the pinmux correctly to access serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switchesTom Warren2012-07-09-1/+1
| | | | | | | | | Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* tegra: Allow boards to perform early GPIO setupThierry Reding2012-07-09-0/+8
| | | | | | | | | The new gpio_early_init() function, which does nothing by default, can be overridden by boards to configure GPIOs at an early stage. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*Tom Warren2012-07-07-5/+5
| | | | | | | | In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* spi: tegra2: rename tegra2_spi.* to tegra_spi.*Tom Warren2012-07-07-1/+1
| | | | | | | | In anticipation of Tegra3 support, start removing/renaming Tegra2-specific files. No functional changes (yet). Also updated copyright to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: ventana: add own device tree, enable USBStephen Warren2012-07-07-0/+57
| | | | | | | | | | Add a device tree for Ventana; the Seaboard file no longer represents the HW present on Ventana. Enable USB on Ventana. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: harmony: add device tree supportStephen Warren2012-07-07-0/+57
| | | | | | | ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Whistler board supportStephen Warren2012-07-07-0/+231
| | | | | | | | | | | | | | | | | | | Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* spi: Tegra2: Seaboard: fix UART corruption during SPI transactionsTom Warren2012-07-07-20/+7
| | | | | | | | | | | Simon Glass's proposal to fix this on Seaboard was NAK'd, so I removed his NS16550 references and added a small delay before SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes and saw no corruption (crc's matched) and no spurious comm chars. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
* tegra: fdt: Add keyboard definitions for SeaboardAnton Staff2012-05-15-0/+27
| | | | | | | | Seaboard uses a QUERTY keyboard. We add key codes for this to enable key scanning to work. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add EMC data for Tegra2 SeaboardSimon Glass2012-05-15-0/+37
| | | | | | | | | | | | This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add EMC settings for SeaboardJimmy Zhang2012-05-15-2/+95
| | | | | | | | | Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Turn off power detect in board initWei Ni2012-05-15-0/+18
| | | | | | | | | | | Tegra core power rail has leakage voltage around 0.2V while system in suspend mode. The source of the leakage should be coming from PMC power detect logic for IO rails power detection. That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0' to PWR_DET (APBDEV_PMC_PWR_DET_0). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Set up warmboot code on Nvidia boardsSimon Glass2012-05-15-0/+6
| | | | | | | Call the function to put warmboot boot in a suitable place for resume. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Set up PMU for Nvidia boardsSimon Glass2012-05-15-0/+6
| | | | | | | Adjust PMU to permit maximum frequency operation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: i2c: Select I2C ordering for SeaboardSimon Glass2012-03-29-0/+18
| | | | | | | Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-12-29 15:16:23 +0000