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* ARM: tegra: enable LCD panel on VentanaStephen Warren2013-07-11-0/+32
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable LCD panel on HarmonyStephen Warren2013-07-11-0/+32
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: Tegra: FDT: Add USB EHCI function for T30/T114Jim Lin2013-07-11-0/+19
| | | | | | | | | | Add DT node for USB EHCI function. Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards. Signed-off-by: Jim Lin <jilin@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: T30: Beaver board support.Tom Warren2013-04-15-0/+71
| | | | | | | | Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu. Add a Beaver build so it can begin to be differentiated, if need be. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)Tom Warren2013-03-25-0/+13
| | | | | | | Took these values directly from the kernel dts files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* tegra114: dalmore: fdt: enable dalmore SPI controllerAllen Martin2013-03-25-0/+5
| | | | | | | | | Dalmore has a SPI flash part attached to controller 4, so enable controller 4 and set to 25MHz. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: fdt: Move aliases from dtsi to dts file as per other TegrasTom Warren2013-03-14-0/+8
| | | | | | | All other Tegra boards have their alias nodes in the .dts file Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)Tom Warren2013-03-14-0/+15
| | | | | | | Took these values directly from the kernel dts files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)Tom Warren2013-03-14-0/+5
| | | | | | | Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT filesTom Warren2013-03-14-2/+0
| | | | | | | Not used, and wrong in Cardhu's case Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT filesTom Warren2013-03-14-6/+56
| | | | | | | | | | Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: fdt: Change /include/ to #include for C preprocessorTom Warren2013-03-14-6/+6
| | | | | | | | | dts Makefile has the arch & board include paths added to DTS_CPPFLAGS. This allows the use of '#include "xyz"' in the dts/dtsi file which helps the C preprocessor find common dtsi include files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: fdt: Update DT files with I2C info for T114/DalmoreTom Warren2013-03-14-0/+25
| | | | | | | | | | | T114, like T30, does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but I2C5 is used to designate the controller intended for power control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: Dalmore: Add DT filesTom Warren2013-02-11-0/+13
| | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra30: fdt: add SPI SLINK nodesAllen Martin2013-02-11-0/+5
| | | | | | | | Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: add back missing host1x nodeAllen Martin2013-02-11-0/+11
| | | | | | | | Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: sort dts filesAllen Martin2013-01-17-70/+58
| | | | | | | | | | | | | | Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: remove clocks nodesAllen Martin2013-01-17-59/+0
| | | | | | | These nodes are unused. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: fdt: Update DT files with I2C info for T30/CardhuTom Warren2013-01-16-0/+41
| | | | | | | | | | | Note that T30 does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but DVC_I2C is still used to designate the controller intended for power control (PWR_I2C in the schematics). On Cardhu, it's used to access the PMU and EEPROM, as well as the audio codec, temp sensor, and fuel gauge devices from the OS. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra30: Cardhu: Add DT filesTom Warren2013-01-16-0/+14
| | | | | | | | | These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* tegra: fdt: Add LCD definitions for SeaboardSimon Glass2012-11-19-0/+33
| | | | | | | | The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled by one of the PWMs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Whistler: remove unused USB aliasStephen Warren2012-10-29-1/+4
| | | | | | | | | | | Port USB1 on Whistler is intended as a device port for USB recovery. Whistler's DT currently contains an alias for this USB port, even though Whistler's config doesn't enable multiple USB controllers, so the alias is unused. Remove the unused alias for consistency for now. Similar, explicitly disable the port in the device tree too. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Harmony: enable ULPI USB portStephen Warren2012-10-29-1/+2
| | | | | | | | | | | | The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: enable NAND on HarmonyStephen Warren2012-09-07-0/+10
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add NAND definitions to fdtSimon Glass2012-09-07-0/+10
| | | | | | | | Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-3/+3
| | | | | | | | | | This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: ventana: add own device tree, enable USBStephen Warren2012-07-07-0/+57
| | | | | | | | | | Add a device tree for Ventana; the Seaboard file no longer represents the HW present on Ventana. Enable USB on Ventana. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: harmony: add device tree supportStephen Warren2012-07-07-0/+57
| | | | | | | ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Whistler board supportStephen Warren2012-07-07-0/+67
| | | | | | | | | | | | | | | | | | | Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add keyboard definitions for SeaboardAnton Staff2012-05-15-0/+27
| | | | | | | | Seaboard uses a QUERTY keyboard. We add key codes for this to enable key scanning to work. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add EMC data for Tegra2 SeaboardSimon Glass2012-05-15-0/+37
| | | | | | | | | | | | This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: i2c: Select I2C ordering for SeaboardSimon Glass2012-03-29-0/+18
| | | | | | | Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: usb: fdt: Add USB definitions for Tegra2 SeaboardSimon Glass2012-03-29-0/+11
| | | | | | | | We set up two USB ports, one of which can be host or device. For some reason the kernel version does enable both ports. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add clock bindings for Tegra2 SeaboardSimon Glass2012-03-29-0/+27
| | | | | | | | | | | Add the definition of the oscillator clock frequency and the 32KHz clock. The latter is provided by a PMIC on I2C which we don't actually use at present, but we expect this definition to be used in the kernel and want to keep our .dts the same. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add device tree file for Tegra2 Seaboard from kernelSimon Glass2012-03-29-0/+36
This was taken from commit b48c54e2 at: git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-05 17:08:48 +0000