| Commit message (Collapse) | Author | Age | Lines |
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This driver supports SPI on Tegra2, running at 48MHz.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
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UARTB is used on some boards, so support it here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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UART selection is done with a lot of #ifdefs. This cleans things up
a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Since low-level init is skipped, the instruction cache is never enabled on
Tegra2. This explicitly calls this initialization as soon as the A9 is
initialized.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.
The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and
modify that function to perform all required GPIO initialization. This
removes the need for board files to perform these operations.
Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which
GPIOs to use.
Update affected call-sites in seaboard.c and harmony.c. Note that this
change should make all SD ports work on Harmony, since the required GPIO
setup is now being performed.
v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change.
Remove prototype of gpio_config_mmc() from board.h
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Andy Fleming <afleming@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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For Seaboard, this is mostly a cut/paste of board_mmc_init() and
pin_mux_mmc() into seaboard.c; pin_mux_mmc() was modified to add some
missing pinmux_tristate_disable calls for the GPIOs.
For Harmony, those functions were modified to configure SDMMC2 (index 2)
instead of SDMMC3 (index 1), since that's what is present on the board.
However, harmony.c is still missing the required GPIO setup, so neither
port is likely to function correctly yet. This will be fixed in the next
change.
v4: Include board.h to prototype tegra2_mmc_init().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This centralizes knowledge of MMC clocking into the MMC driver. This also
removes clock setup from the board files, which will simplify later changes
that modify the Harmony board to support the correct set of MMC controllers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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This adds the required GPIO and pinmux configuration to make eMMC / SD work
on Seaboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.
Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.
Sorry about this, but better to get it right now when there is only a small
amount of code affected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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This adds most of the clock functions required by board and driver code:
-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control
These functions are plumbed in as required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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This removes clock_init() and pinmux_init() which are names better suited
to those respective modules. By moving board_init_f() to the bottom of the
file we can remove the need for so many functions in the board.h header file.
The only clock/pinmux/gpio init we need to do prior to relocation is
for the UART.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.
This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Simon Glass <sjg@chromium.org>
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This adds an enum for each pin and some functions for changing the pin
muxing setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This adds functions to enable/disable clocks and reset to on-chip peripherals.
Signed-off-by: Simon Glass <sjg@chromium.org>
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NVIDIA boards and Samsung SMDK6400 already use a local variant of
CONFIG_MACH_TYPE option.
Switch to use the new common code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Tom Warren <twarren@nvidia.com>
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