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* mpc8641hpcn: Fix LAW and TLB setup to use the IO_PHYS #defines.Ed Swarthout2007-04-20-3/+3
| | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* Enable LAWs for MPC8641 PCI-Ex2.Zhang Wei2007-04-20-2/+2
| | | | | Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Add PIXIS FPGA support for MPC8641HPCN board.Haiying Wang2007-04-09-465/+6
| | | | | | | | | | | | | | | | Move the 8641HPCN's PIXIS code to the new directory board/freescale/common/ as it will be shared by future boards not in the same processor family. Write a "pixis_reset" command that utilizes the FPGA reset sequencer to support alternate soft-reset options such as using the "alternate" flash bank, enabling the watch dog, or choosing different CPU frequencies. Add documentation for the pixis_reset to README.mpc8641hpcn. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Fix 8641HPCN problem with ld version 2.16Jon Loeliger2007-03-22-0/+2
| | | | | | | | (Dot outside sections problem). This fix is in the spirit of 807d5d7319330e336ab34a5623c5e0d73b87d540. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Move "ar" flags to config.mk to allow for silent "make -s"Jon Loeliger2006-10-11-1/+1
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* Fix whitespace issues.Jon Loeliger2006-10-10-1/+0
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* Modified makefile for new build mechanism.Jon Loeliger2006-09-19-8/+11
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* General indent and whitespace cleanups.Jon Loeliger2006-08-22-160/+170
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* Removed MPC8641HPCN DTS source file from build.Jon Loeliger2006-08-09-403/+3
| | | | | | | It is no longer linked into U-Boot; its sources are now located in the kernel tree. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Add Rapidio support for the MPC8641HPCNJohn Traill2006-08-09-0/+54
| | | | Signed-off-by: John Traill <john.traill@freescale.com>
* Correct the irq value of DUART2Haiying Wang2006-07-31-1/+1
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* Move get_board_sys_clk to board directoryHaiying Wang2006-07-31-0/+64
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* Fixed OF device tree of mpc86xxhpcn board.Zhang Wei2006-07-27-61/+75
| | | | | | The changes works in with kernel irq mapping rework. Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
* Add support for reading and writing mac addresses to or from ID EEPROM.Haiying Wang2006-07-13-1/+245
| | | | | | | | | | | | | | | | | | Added code for reading and writing Mac addresses to/from ID EEPROM(0x57). With attached patch, we can use command "mac/mac read/mac save/" to read and write EEPROM under u-boot prompt. U-boot will calculate the checksum of EEPROM while bootup, if it is right, then u-boot will check whether the mac address of eTSEC0/1/2/3 is availalbe (non-zero). If there is mac address availabe in EEPROM, u-boot will use it, otherewise, u-boot will use the mac address defined in MPC8641HPCN.h. This matches the requirement to set unique mac address for each TSEC port. Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* Fix bug in 8641hpcn reset command with no args.Jon Loeliger2006-06-22-1/+1
| | | | | Signed-off-by: Haiying Wang <haiying.wang@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* Reworked IRQ mapping in OF-tree.Zhang Wei2006-06-22-39/+55
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* Allow DTC path to be passed in.Jon Loeliger2006-06-07-1/+5
| | | | Signed-off-by: Jon Loeliger <jdl@jdl.com>
* Modify the IRQ of DUART2Haiying Wang2006-06-07-1/+1
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* Review cleanups.Jon Loeliger2006-05-31-18/+16
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* White space cleanup.Jon Loeliger2006-05-31-110/+117
| | | | | | | | | Some 80-column cleanups. Convert printf() to puts() where possible. Use #include "spd_sdram.h" as needed. Enhanced reset command usage message a bit. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Removed unneeded local_bus_init() from 8641HPCN board.Jon Loeliger2006-05-31-34/+0
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Moved mpc8641hpcn_board_reset() out of cpu/ into board/.Jon Loeliger2006-05-31-0/+93
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Move mpc86xx PIXIS code to board directoryJon Loeliger2006-05-31-1/+358
| | | | | | | | First cut at moving the PIXIS platform code out of the 86xx cpu directory and into board/mpc8641hpcn where it belongs. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Added pci@8000 block.Haiying Wang2006-05-26-11/+119
| | | | | | | Updated ethernet interrupt mappings (moved up 48). Cleaned up a few comments. Signed-off-by: Jon Loeliger <jdl@jdl.com>
* Update 86xx address map and LAWBARs.Jon Loeliger2006-05-19-5/+20
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* Enable 2nd CPU and I2C.Jon Loeliger2006-05-19-4/+26
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* Update interrupt mapping.Jon Loeliger2006-05-15-11/+11
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* Remove unneeded INIT_RAM_LOCK cache twiddling.Haiying Wang2006-05-10-11/+0
| | | | | | Correctly tracks r29 as global data pointer now. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Remove unnecessary flash.c file.Jon Loeliger2006-05-10-550/+0
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* Get MPC8641HPCN flash images working.Jon Loeliger2006-05-09-21/+3
| | | | | | | | Enable the CFI driver. Remove bogus LAWBAR7 cruft. Use correct TEXT_BASE, Fixup load script. Enable SPD EEPROM during DDR setup. Use generic RFC 1918 IP addresses by default.
* Cleanup whitespaces and style issues.Jon Loeliger2006-04-27-22/+13
| | | | | | | Removed //-style comments. Use 80-column lines. Remove trailing whitespace. Remove dead code and debug cruft.
* Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-0/+1460
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