summaryrefslogtreecommitdiff
path: root/board/mpc8540ads
Commit message (Collapse)AuthorAgeLines
* * Patch by Jon Loeliger, 2005-07-25Jon Loeliger2005-07-25-1/+0
| | | | | Move the TSEC driver out of cpu/mpc85xx as it will be shared by the upcoming mpc83xx family as well.
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-2/+2
| | | | | | | | Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
* Patches by Jon Loeliger, 24 Aug 2004:wdenk2004-10-10-537/+0
| | | | | - Add support for the MPC8541 and MPC8555 CDS boards - Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
* * Patch by Jon Loeliger, 24 Aug 2004:wdenk2004-10-10-8/+1
| | | | | | | | | | | - Fix PCI window on MPC85xx; remove unneeded PCI initialization from board_early_init_f() - Provide SW workaround for PCI initialization on 85xx CDS - Convert MPC85xxADS to use common CFI flash driver * Cleanup: avoid compiler warnings * Add CMC PU2 board to MAKEALL script
* Patch by Jon Loeliger, 16 Jul 2004:wdenk2004-08-01-186/+319
| | | | | | | | | | | | | - support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads
* Patch by Jon Loeliger, 17 June 2004:wdenk2004-07-09-129/+164
| | | | | | | | Completion of the 8540ADS/8560ADS updates: Fix some PCI and Rapid I/O memory maps, Initialize both TSEC 1 and 2, Initialize SDRAM Update MAINTAINER for 85xx boards and README.mpc85xxads
* Patches Part 1 by Jon Loeliger, 11 May 2004:wdenk2004-06-09-37/+56
| | | | | | | | | | | | | | | | | | | | | | Dynamically handle REV1 and REV2 MPC85xx parts. (Jon Loeliger, 10-May-2004). New consistent memory map and Local Access Window across MPC85xx line. New CCSRBAR at 0xE000_0000 now. Add RAPID I/O memory map. New memory map in README.MPC85xxads (Kumar Gala, 10-May-2004) Better board and CPU identification on MPC85xx boards at boot. (Jon Loeliger, 10-May-2004) SDRAM clock control fixes on MPC8540ADS & MPC8560 boards. Some configuration options for MPC8540ADS & MPC8560ADS cleaned up. (Jim Robertson, 10-May-2004) Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver. Supports multiple PHYs. (Andy Fleming, 10-May-2004) Some README.MPC85xxads updates. (Kumar Gala, 10-May-2004) Copyright updates for "Freescale" (Andy Fleming, 10-May-2004)
* * The PS/2 mux on the BMS2003 board needs 450 ms after power onwdenk2004-01-20-1/+1
| | | | | | | | | | | | before we can access it; add delay in case we are faster (with no CF card inserted) * Cleanup of some init functions * Make sure SCC Ethernet is always stopped by the time we boot Linux to avoid Linux crashes by early packets coming in. * Accelerate flash accesses on LWMON board by using buffered writes
* * Patches by Xianghua Xiao, 15 Oct 2003:wdenk2003-10-15-0/+1210
- Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup
generated by cgit v1.1 at 2024-11-17 02:36:04 +0000