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* Merge branch 'lwmon5-no-ocm'Stefan Roese2008-01-09-1/+1
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| * ppc4xx: Change LWMON5 to not use OCM for init-ram and POST anymoreStefan Roese2008-01-09-1/+1
| | | | | | | | | | | | | | This patch configures the LWMON5 port to use d-cache as init-ram and the unused GPT0_COMP6 as POST WORD storage. Signed-off-by: Stefan Roese <sr@denx.de>
* | PPC4xx: Remove sdram.h from board/lwmon5Larry Johnson2008-01-04-505/+0
| | | | | | | | | | | | These definitions are now in "include/ppc440.h". Signed-off-by: Larry Johnson <lrj@acm.org>
* | PPC4xx: Use common code for LWMON5 board SDRAM supportLarry Johnson2008-01-04-337/+20
|/ | | | | | | This patch also modifies the functionality of the code so that the data-eye search is now done with with the cache disabled. Signed-off-by: Larry Johnson <lrj@acm.org>
* Add definitions for 440EPx/GRx SDRAM controller to ppc440.hLarry Johnson2007-12-27-2/+2
| | | | | | | | | This patch adds the Denali SDRAM controller definitions to "ppc440.h". It also fixes two typos in the definitions, so the board-specific "sdram.h" files containing these definitions are also fixed to avoid compiler warnings. Signed-off-by: Larry Johnson <lrj@acm.org>
* Merge commit 'u-boot/master' into for-1.3.1Stefan Roese2007-12-11-9/+17
|\ | | | | | | | | | | Conflicts: drivers/rtc/Makefile
| * ppc4xx: lwmon5: Change PHY reset sequence for PHY MDIO address latchingStefan Roese2007-11-13-9/+17
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-1/+1
|/ | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 boardStefan Roese2007-08-23-0/+27
| | | | | | | | | | | This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5 board. Now the "eeprom" command can be used to read/write from/to this device. Additionally a new command was added "eepromwp" to en-/disable the write-protect of this 2nd EEPROM. The 1st EEPROM is not affected by this write-protect command. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/u-boot-ppc4xxStefan Roese2007-08-21-2/+0
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| * lib_ppc: make board_add_ram_info weakKim Phillips2007-08-18-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | platforms wishing to display RAM diagnostics in addition to size, can do so, on one line, in their own board_add_ram_info() implementation. this consequently eliminates CONFIG_ADD_RAM_INFO. Thanks to Stefan for the hint. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)Stefan Roese2007-08-21-13/+466
|/ | | | | | | | | This patch adds support for the matrix keyboard on the lwmon5 board. Since the implementation in the dsPCI is kind of compatible with the "old" lwmon board, most of the code is copied from the lwmon board directory. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Update 440EPx lwmon5 board supportStefan Roese2007-07-31-24/+13
| | | | | | | | - Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: lwmon5: Update Lime initializationAnatolij Gustschin2007-07-26-2/+60
| | | | | | | | | Change Lime SDRAM initialization to now support 100MHz and 133MHz (if enabled). Also the framebuffer is initialized to display a blue rectangle with a white border. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: lwmon5: Support for 128 MByte NOR FLASH addedStefan Roese2007-07-24-2/+2
| | | | | | | The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)Stefan Roese2007-07-24-6/+6
| | | | | | | As suggested by Hakan Eryigit, here an updated setup for the lwmon5 interrupt controller. Signed-off-by: Stefan Roese <sr@denx.de>
* POST: Add ECC POST for the lwmon5 boardPavel Kolesnikov2007-07-20-0/+11
| | | | | | | | | This patch adds ECC Post test for the Lwmon5 board based on PPC440EPx to U-Boot. Signed-off-by: Pavel Kolesnikov <concord@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
* ppc4xx: Code cleanupStefan Roese2007-07-16-1/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Update lwmon5 boardStefan Roese2007-07-04-8/+73
| | | | | | | | | | - Add optional ECC generation routine to preserve existing RAM values. This is needed for the Linux log-buffer support - Add optional DDR2 setup with CL=4 - GPIO50 not used anymore - Lime register setup added Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-2/+2
| | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk2007-06-20-16/+16
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* [ppc4xx] Add initial lwmon5 board supportStefan Roese2007-06-15-0/+1892
This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
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