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* Change initdram() return type to phys_size_tBecky Bruce2008-06-12-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()Stefan Roese2008-04-29-3/+10
| | | | | | | | | | | | | | | As it seems the "old" ECC initialization routine by using dflush() didn't write all lines in the dcache back to memory on lwmon5. This could lead to ECC error upon Linux booting. This patch changes the program_ecc() routine to now use clean_dcache_range() instead of dflush(). clean_dcache_range() uses dcbst which is exactly what we want in this case. Since dflush() is known is cause problems, this routine will be removed completely and replaced by clean_dcache_range() with an additional patch. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable ECC on LWMON5Stefan Roese2008-03-27-70/+20
| | | | | | | | | | | Since all ECC related problems seem to be resolved on LWMON5, this patch now enables ECC support. We have to write the ECC bytes by zeroing and flushing in smaller steps, since the whole 256MByte takes too long for the external watchdog. Signed-off-by: Stefan Roese <sr@denx.de>
* PPC4xx: Use common code for LWMON5 board SDRAM supportLarry Johnson2008-01-04-337/+20
| | | | | | | This patch also modifies the functionality of the code so that the data-eye search is now done with with the cache disabled. Signed-off-by: Larry Johnson <lrj@acm.org>
* ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-1/+1
| | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* lib_ppc: make board_add_ram_info weakKim Phillips2007-08-18-2/+0
| | | | | | | | | | | | platforms wishing to display RAM diagnostics in addition to size, can do so, on one line, in their own board_add_ram_info() implementation. this consequently eliminates CONFIG_ADD_RAM_INFO. Thanks to Stefan for the hint. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* ppc4xx: Update 440EPx lwmon5 board supportStefan Roese2007-07-31-24/+13
| | | | | | | | - Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Code cleanupStefan Roese2007-07-16-1/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Update lwmon5 boardStefan Roese2007-07-04-0/+64
| | | | | | | | | | - Add optional ECC generation routine to preserve existing RAM values. This is needed for the Linux log-buffer support - Add optional DDR2 setup with CL=4 - GPIO50 not used anymore - Lime register setup added Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk2007-06-20-11/+11
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* [ppc4xx] Add initial lwmon5 board supportStefan Roese2007-06-15-0/+598
This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
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