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* drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-1/+1
| | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: AM33xx+: Update ioregs to pass different valuesLokesh Vutla2013-12-18-1/+9
| | | | | | | | | | | Currently same value is programmed for all ioregs. This is not the case for all SoC's like AM4372. So adding a structure for ioregs and updating in all board files. And also return from config_cmd_ctrl() and config_ddr_data() functions if data is not passed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Fixup dxr2, cm_t335, adapt pcm051 rev3] Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Stop modifying certain EMIF4D registersTom Rini2013-12-04-4/+0
| | | | | | | | | | | | | | | Based on the definitive guide to EMIF configuration[1] certain registers that we have been modifying (and are documented registers) should be left in their reset values rather than modified. This has been tested on AM335x GP EVM and Beaglebone White. [1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Heiko Schocher <hs@denx.de> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org>
* board: arm: convert makefiles to Kbuild styleMasahiro Yamada2013-11-01-27/+2
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@ti.com>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-14-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* pcm051/igep0033: Supply bd_ram_ofs for cpsw driverLars Poeschel2013-10-07-0/+1
| | | | | | | | | | | Since 2bf36ac638ab2db9f0295aa47064976eeebf80c1 the BD ram address is not hardcoded inside cpsw driver any more. Platforms have to supply their bd_ram_ofs in the platform data to the driver. This commit does this for pcm051 and igep0033 boards. Tested-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* ARM: IGEP0033: Update timing to run DDR at 400MHz.Enric Balletbo i Serra2013-10-07-2/+2
| | | | | | | We can run the DDR at 400MHz, so update the timings for that purpose. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
* arm, am33xx: add defines for gmii_sel_register bitsHeiko Schocher2013-08-28-4/+2
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
* am33xx: Stop using PHYS_DRAM_1 defineTom Rini2013-08-15-1/+1
| | | | | | | | | We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1 in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and then using that name in code. Signed-off-by: Tom Rini <trini@ti.com>
* ARM: IGEP0033: Remove CYGNUS name from header.Enric Balletbo i Serra2013-08-15-2/+2
| | | | | | | | We will not use CYGNUS names for any IGEP COM based on AM335x processor, so, to avoid confusion, remove from headers. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
* ARM: AM33xx: Move s_init to a common placeHeiko Schocher2013-08-15-42/+8
| | | | | | | | | | | | s_init has the same outline for all the AM33xx based board. So making it generic. This also helps in addition of new Soc with minimal changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup clocks layerLokesh Vutla2013-08-15-5/+6
| | | | | | | | | | | Cleaning up the clocks layer. This helps in addition of new Soc with minimal changes. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: AM33xx: Cleanup dplls dataLokesh Vutla2013-08-15-0/+10
| | | | | | | | | | | | | Locking sequence for all the dplls is same. In the current code same sequence is done repeatedly for each dpll. Instead have a generic function for locking dplls and pass dpll data to that function. This is derived from OMAP4 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-27/+3
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* arm, am33xx: move uart soft reset code to common placeHeiko Schocher2013-06-18-23/+1
| | | | | | | | | | | | | | | move uart soft reset code to common place and call this function from board code, instead of copy and paste this code for every board. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Tom Rini <trini@ti.com> [trini: Fix igep0033 build, remove 'regval' on pcm051] Signed-off-by: Tom Rini <trini@ti.com>
* arm, am33xx: move rtc32k_enable() to common placeHeiko Schocher2013-06-18-16/+0
| | | | | | | | | | move rtc32k_enable() to common place so all am33xx boards can use it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Matt Porter <mporter@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Tom Rini <trini@ti.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.cTom Rini2013-06-05-0/+9
| | | | | | | | | | | We need to call the save_omap_boot_params function on am33xx/ti81xx and other newer TI SoCs, so move the function to boot-common. Only OMAP4+ has the omap_hw_init_context function so add ifdefs to not call it on am33xx/ti81xx. Call save_omap_boot_params from s_init on am33xx/ti81xx boards. Reviewed-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM: Add support for IGEP COM AQUILA/CYGNUSEnric Balletbo i Serra2013-05-10-0/+394
The IGEP COM AQUILA and CYGNUS are industrial processors modules with following highlights: o AM3352/AM3354 Texas Instruments processor o Cortex-A8 ARM CPU o 3.3 volts Inputs / Outputs use industrial o 256 MB DDR3 SDRAM / 128 Megabytes FLASH o MicroSD card reader on-board o Ethernet controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
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