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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-4/+465
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| * mx6sxsabresd: Add Ethernet supportFabio Estevam2014-08-20-0/+116
| | | | | | | | | | | | | | | | mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031. Add support for one FEC port initially. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sxsabresd: Convert to the new Kconfig styleFabio Estevam2014-08-20-0/+29
| | | | | | | | | | | | | | mx6sxsabresd was not in the master branch when the conversion to the new Kconfig style happened, so convert it now so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sxsabresd: Update DDR initializationFabio Estevam2014-08-20-31/+58
| | | | | | | | | | | | | | | | Use the latest DDR initialization values suggested by the FSL hardware team. While at it, add some comments for clarification. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx31pdk: Change maintainerFabio Estevam2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | Currently I don't have access to a mx31pdk board. Magnus was the original maintainer of the board and accepted to take back this role. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-538/+2504
| |\ | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam2014-08-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-4/+6
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| * | | mx6: Remove duplication of iomuxc structureFabio Estevam2014-07-23-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to keep iomuxc_base_regs structure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers. The additional fields of iomuxc_base_regs are not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line. So remove iomuxc_base_regs structure and use iomuxc instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx6sxsabresd: Add PFUZE100 PMIC supportFabio Estevam2014-07-23-0/+84
| | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2014-07-16-1070/+475
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Conflicts: boards.cfg
| * | | | mx6sx: Add initial support for mx6sxsabresd boardFabio Estevam2014-07-10-0/+206
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | | powerpc/t4qds: Move doc/README.t4240qds under board/freescale/t4qdsYork Sun2014-08-20-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Board specific README file should be moved to board folder. Signed-off-by: York Sun <yorksun@freescale.com>
* | | | | powerpc/T4240QDS/eth: some fix for XFIShaohui Xie2014-08-20-18/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs of serdes2 are routed to a SFP+ cages, which to house fiber cable or direct attach cable(copper), the copper cable is used to emulate the 10GBASE-KR scenario. So, for XFI usage, there are two scenarios, one will use fiber cable, another will use copper cable. For fiber cable, there is NO PHY, while for copper cable, we need to use internal PHY which exist in Serdes to do auto-negotiation and link training, which implemented in kernel. We use hwconfig to define cable type for XFI, and fixup dtb based on the cable type. For copper cable, set below env in hwconfig: fsl_10gkr_copper:<10g_mac_name> the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports, if a given 10G port will use the copper cable for 10GBASE-KR, set the <10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be assumed to be used for the port. For ex. if four XFI ports will both use copper cable, the hwconfig should contain: fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2 For fiber cable: 1. give PHY address to a XFI port, otherwise, the XFI ports will not be available in U-boot, there is no PHY physically for XFI when using fiber cable, this is just to make U-boot happy and we can use the XFI ports in U-boot. 2. fixup dtb to use fixed-link in case of fiber cable which has no PHY. Kernel requests that a MAC must have a PHY or fixed-link. When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface. Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56 is not valid any longer. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | powerpc/t104xrdb: support deep sleep in SPI/SD bootTang Yuantian2014-08-12-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add deep sleep support in SPI/SD boot. The destination address second stage uboot image is loaded to is changed because currently this address will be used by kernel which means we can't reserve it for resume. Entry point to kernel is still placed in second stage uboot. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | powerpc/t1042RDB: Add Video - HDMI supportJason Jin2014-08-12-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1042 has internal display interface unit (DIU) for driving video. T1042RDB supports video mode via -LCD using TI enconder -HDMI type interface via HDMI encoder Chrontel, CH7301C encoder which is I2C programmable is used as HDMI connector on T1042RDB. This patch add support to -enable Video interface for T1042RDB -route qixis multiplexing to enable DIU-HDMI interface on board -program DIU pixel clock gerenartor for T1042 -program HDMI encoder via I2C on board This patch refer to the upstream diu patch (337b0c52b3296f371d04aef71a833e09110e0e6b) for T1040qds. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> [York Sun: resolve conflict and move changes to T104xRDB.h] Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | fsl/diu: ch7301 encoder split off from t1040qds/diu.cWang Dongsheng2014-08-12-126/+159
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | The ch7301 encoder not only used in t1040qds platform, so we split it for t1042rdb and LSx platform. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+795
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+1507
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | powerpc/t4240qds: fix offset of serdes when checking reference clockShaohui Xie2014-07-22-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240 has 4 serdes, each serdes has 4k memory space, two PLLs. We use PLL1CR0 to check the serdes reference clock. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | powerpc/mpc85xx: Check return value of find_tlb_idxYork Sun2014-07-22-64/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | find_tlb_idx() is called in board_early_init_r() on multiple boards. The return value is not checked before being used to disable a TLB. In normal case the return value wouldn't be -1. In case of a mis- configuration during porting to a new board, checking the return value may be helpful to reveal some user errors. Signed-off-by: York Sun <yorksun@freescale.com>
* | | | powerpc/t1040qds: Initialize EPHY2 clock to RGMII onlyvijay rai2014-07-22-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting FPGA register brdcfg9 EPHY2 bits to '0' to initialize EPHY2 clock to RGMII mode. Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | powerpc/mpc85xx: Remove P1023 RDS supportLijun Pan2014-07-22-469/+0
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | Since P1023RDS is no longer supported/manufactured by Freescale, we clean up P1023RDS related code. Since P1023RDB is still supported by Freescale, we keep P1023RDB releated code. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | m68k: fix an undefined behavior warning of M5253DEMO boardMasahiro Yamada2014-07-22-4/+6
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The latest GCC is so clever that it reports more warnings than old ones did: ------------------------------>8------------------------------ board/freescale/m5253demo/flash.c: In function 'flash_get_offsets': board/freescale/m5253demo/flash.c:65:23: warning: iteration 2047u invokes undefined behavior [-Waggressive-loop-optimizations] info->start[k + 1] = info->start[k] + CONFIG_SYS_SST_SECTSZ; ^ board/freescale/m5253demo/flash.c:64:3: note: containing loop for (k = 0, j = 0; j < CONFIG_SYS_SST_SECT; j++, k++) { ^ ------------------------------8<------------------------------ The cause of the warning is like this: The for statement iterates 2048 times in flash_get_offsets() func. (Notice CONFIG_SYS_SST_SECT is defined as 2048) The last iteration does info->start[2048] = info->start[2047] + CONFIG_SYS_SST_SECTSZ; causing an undefined behavior. (Please note the array size of info->start is 2048. CONFIG_SYS_MAX_FLASH_SECT is defined as 2048 for this board.) This commit fixes that so as not to overrun the info->start array. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Jason Jin <Jason.jin@freescale.com>
* | ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board supportYork Sun2014-07-04-0/+356
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2085A is an ARMv8 implementation. This adds board support for emulator and simulator: Two DDR controllers UART2 is used as the console IFC timing is tightened for speedy booting Support DDR3 and DDR4 as separated targets Management Complex (MC) is enabled Support for GIC 500 (based on GICv3 arch) Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-30-3/+233
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| * mx28evk: Add documentation on how to boot from SPI NORFabio Estevam2014-06-17-3/+19
| | | | | | | | | | | | | | | | | | Explain the necessary steps in order to boot from SPI NOR. Based on a earlier submission from Mårten Wikman. Signed-off-by: Mårten Wikman <marten.wikman@novia.fi> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sabred: Add PFUZE100 PMIC supportFabio Estevam2014-05-28-0/+84
| | | | | | | | | | | | | | | | mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sabreauto: Add the mx6dual-lite variantFabio Estevam2014-05-28-0/+130
| | | | | | | | | | | | Tested by booting a mainline kernel via TFTP. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-25-1068/+92
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| * | freescale: m5253demo: fix unused-but-set-variable warningsMasahiro Yamada2014-06-19-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning messages: In function 'flash_erase': 180:21: warning: variable 'last' set but not used [-Wunused-but-set-variable] In function 'write_buff': 322:10: warning: variable 'port_width' set but not used [-Wunused-but-set-variable] Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
| * | mx31ads: Fix the U-Boot binary outputSimon Glass2014-06-11-1/+3
| | | | | | | | | | | | | | | | | | | | | Correct the binary output so that image_binary_size is really at the end of the image. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-28/+87
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| | * | powerpc/B4420: Fixed incomplete handling for 0x9d serdes2poonam aggrwal2014-06-05-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Crossbars and IDT were not getting configured for Serdes2 protocol 0x9d for B4420. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | powerpc/t4rdb: Add alternate serdes protocols to align with A-007186Chunhe Lan2014-06-05-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols only using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. Alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | board/t2080qds: some update for ddrShengzhou Liu2014-06-05-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add support for 2nd DIMM slot. - make it work with DIMM which is less than 2GB. Verified with two 2GB UDIMM MT9JSF25672AZ-2G1K1 in two DIMM slots. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | powerpc/t4qds: Add alternate serdes protocols to align with A-007186Shaohui Xie2014-06-05-2/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. Only the protocols using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | board/t208x: update t2080qds/t2080rdb for errata A-007186Shengzhou Liu2014-06-05-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As errata A-007186, we need to use the alternate serdes protocol instead of those impacted protocols. - add support for serdes protocols: 0x1b, 0x50, 0x5e, 0x64, 0x6a, 0xd2, 0x67, 0x70. - update t2080_rcw.cfg to adapt to new rcw_66_15 for t2080qds and t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | nand_spl: remove P1023RDS_NAND supportMasahiro Yamada2014-06-05-7/+0
| |/ / | | | | | | | | | | | | | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | powerpc: mpc8260ads: remove orphan boardMasahiro Yamada2014-05-30-1028/+0
| |/ | | | | | | | | | | | | | | | | | | | | This board has been orphan for a while. (Emails to its maintainer have been bouncing.) Because MPC82xx family is old enough, nobody would pick up the maintainership on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denx <wd@denx.de>
* | arm: vf610: Add QSPI support for VF610TWRChao Fu2014-06-09-2/+27
|/ | | | | | | Add QSPI support for VF610TWR, such as clock and iomux. Signed-off-by: Alison Wang <Huan.Wang@freescale.com> Signed-off-by: Chao Fu <b44548@freescale.com>
* arm: vf610: add DDR_SEL_PAD_CONTR registerStefan Agner2014-05-25-1/+2
| | | | | | | | Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM issues with newer silicon (1.1). This register was added in revision 4 of the Vybrid Reference Manual. Signed-off-by: Stefan Agner <stefan@agner.ch>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2014-05-20-19/+1491
|\ | | | | | | | | | | | | | | | | Conflicts: boards.cfg Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
| * board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPLPrabhakar Kushwaha2014-05-16-13/+267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the earlier patches, the SPL/TPL fraamework was introduced. For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The SPL was loaded by the code from the internal on-chip ROM. The SPL initializes the DDR according to the SPD and loads the final uboot image into DDR, then jump to the DDR to begin execution. For NAND booting way, the nand SPL has size limitation on some board(e.g. P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD and loads the final uboot image into DDR,then jump to the DDR to begin execution. This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to execute, so the section .resetvec is no longer needed. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t104xrdb: Toggle deep sleep management signals after resumeTang Yuantian2014-05-16-0/+2
| | | | | | | | | | | | | | | | | | T104xrdb has several sleep management signals that are used for deep sleep. They are enabled by OS to enter deep sleep and should be disabled by u-boot when cores wake up. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/freescale: Move CRC32 offset in NXID v1 data formatEbony Zhu2014-05-16-3/+4
| | | | | | | | | | | | | | | | | | | | According to AN3638, CRC of NXID v1 is at the end of the 256-byte I2C memory. The wrong CRC32 offset prevents Uboot from reading system information from EEPROM. No NXID v0 is being used on Freescale boards. Signed-off-by: Ebony Zhu <b45385@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/freescale: Change the return value of mac_read_from_eeprom()York Sun2014-05-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | The return value has not been checked by its caller, until recent change of using generic board architecture. The error of this function is not critical enough to hang the system. Printing the warning message is enough to catch user's attention. U-boot should continue to boot to give user a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging in the board_init_r(). Signed-off-by: York Sun <yorksun@freescale.com>
| * PPC 85xx QEMU: Always assume 1 coreAlexander Graf2014-05-13-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need u-boot to bother about a single core in the QEMU machine. Everything that would require additional knowledge of more cores gets handled by QEMU and passed straight into the payload we execute. Because of this setup, it would be counterproductive to enable SMP support in u-boot. We would have to rip CPUs out of already existing spin tables and respin them from u-boot. It would be a pretty big mess. So only assume we have a single core. This fixes errors about CONFIG_MP being disabled. Signed-off-by: Alexander Graf <agraf@suse.de>
| * powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-05-13-0/+697
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
| * board/b4qds: VID supportShaveta Leekha2014-05-13-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. B4860QDS has a PowerOne ZM7300 programmable digital Power Manager which is programmed as per the value read from the fuses. Reference for this code is taken from t4qds VID implementation. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
generated by cgit v1.1 at 2024-11-06 05:39:49 +0000