summaryrefslogtreecommitdiff
path: root/board/freescale
Commit message (Collapse)AuthorAgeLines
...
| * | | mx53smd: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6qarm2: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx51evk: Fix error handling in board_mmc_init()Fabio Estevam2014-11-21-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx: imx6q/dlsabreauto: Add PMIC Pfuze100 supportYe.Li2014-11-20-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the pfuze100 initialization in power_init_board for imx6q/dl sabreauto board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sxsabresd: Use the pfuze common init functionYe.Li2014-11-20-41/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the pfuze init for mx6sxsabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sabresd: Use the pfuze common init functionYe.Li2014-11-20-43/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the pfuze init for mx6sabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sabre common: Factorize the Pfuze init functionYe.Li2014-11-20-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the Pfuze initializations are similar on various mx6 SABRE boards. Factorize the initialization to a common function in file board/freescale/common/pfuze.c. So that all SABRE boards BSP can share the function. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | imx: mx6sxsabresd: Add board support for USDHC2 and USDHC3Ye.Li2014-11-20-5/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board. The default boot socket is USDHC4, so the MMC environment device and mmcdev variable are set to this device. Signed-off-by: Ye.Li <B37916@freescale.com>
| * | | mx6sabresd: Access SRC_SBMR1 register via structureFabio Estevam2014-11-20-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In U-boot it is preferred to access the register via structure pointer, so convert it such style. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6sabresd: Add mx6sabresd_spl_defconfig to MAINTAINERS entryFabio Estevam2014-11-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's add mx6sabresd_spl_defconfig entry into MAINTAINERS, so that we avoid getting a warning that the mx6sabresd_spl is not maintained. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6sxsabresd: Simplify the return value of setup_fec()Fabio Estevam2014-11-20-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We can simply the return the value from enable_fec_anatop_clock() to make the code smaller and simpler. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6slevk: Simplify the return value of setup_fec()Fabio Estevam2014-11-20-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We can simply the return the value from enable_fec_anatop_clock() to make the code smaller and simpler. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6sabresd: State that only mx6q is supported in SPLFabio Estevam2014-11-20-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | Make clear that current SPL code only supports the mx6q variant. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx53loco: Fix error handling in board_mmc_init()Fabio Estevam2014-11-20-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6qsabreauto: Add parallel NOR flash supportFabio Estevam2014-11-20-1/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6sabreauto boards come with 32 MiB of parallel NOR flash. Add support for it: U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04) CPU: Freescale i.MX6Q rev1.2 at 792 MHz Reset cause: POR Board: MX6Q-Sabreauto revA I2C: ready DRAM: 2 GiB Flash: 32 MiB NAND: 0 MiB Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is not used. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6: Use a common SPL configuration fileFabio Estevam2014-11-20-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many boards use a minimal .cfg file in the SPL case. Introduce spl_sd.cfg so that we can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx6sabresd: Move the DCD settings to spl codeFabio Estevam2014-11-20-38/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR. Move the configuration to the spl code. CCM_CCOSR setting is no longer required to get audio functionality in the kernel, so remove such setting. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | imx:mx6sxsabresd fix pfuz probe failedPeng Fan2014-11-20-1/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PFUZ probe failed with the following msg: " wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=0 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=1 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=2 i2c_init_transfer: give up i2c_regs=021a0000 Can't find PMIC:PFUZE100 " board_early_init_f is too early to call i2c related setting, because init_func_i2c is called after board_early_init_f being invoked. Thus move setup_i2c into board_init. Also PFUZ is connected to I2C bus 0, so change "1" -> "0". Using this patch PFUZ can be correctly probed: "PMIC: PFUZE100 ID=0x11" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-3/+3
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-11-14-0/+239
|\ \
| * | powerpc/BSC9131RDB: Enable creation of dynamic partitions for NANDAshish Kumar2014-11-14-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * Run "mtdparts default" to create NAND partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/BSC9132QDS: Enable creation of dynamic partition for NAND and NORAshish Kumar2014-11-14-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * run "mtdparts default" to create NAND, NOR partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | t104xrdb: Add Errata A_007662, A_008007 workaround in pbi.cfgPriyanka Jain2014-11-14-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -A_007662 states that for x1 link width, PCIe2 controller trains in Gen1 speed while configured for Gen2 speed. Workaround:Set the width to x1 and speed to Gen2 by writing to CCSR registers in PBI phase -A_008007 states that PVR register may show random value. Workaround: Reset PVR register using DCSR space in PBI phase Add PBI based software workaround for A_007662 and A_008007 in t104x_pbi.cfg. This is required for SPL-based bootloaders like NAND-boot, SD-boot, SPI-boot Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t4rdb: Add support of CPLDChunhe Lan2014-11-14-0/+206
| |/ | | | | | | | | | | | | | | | | | | | | This support of CPLD includes - Files and register definitions - Command to switch alternate bank - Command to switch default bank Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | mx6sabresd: Staticize when possibleFabio Estevam2014-11-13-6/+6
| | | | | | | | | | | | Annotate 'static' when appropriate for the variables used locally. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx6sabresd: Fix error handling in board_mmc_init()Fabio Estevam2014-11-13-4/+6
| | | | | | | | | | | | | | | | When an invalid USDHC port is passed we should return -EINVAL instead of 0. Also, return the error immediately on fsl_esdhc_initialize() failure. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | imx6: SPL support for iMX6 SabreSDJohn Tobias2014-11-13-2/+184
| | | | | | | | | | | | | | | | This patch will enable the support for SPL on iMX6 SabreSD. It tested on SD2 and SD3 mmc port (Switch 1 or 2 of SW6) Signed-off-by: John Tobias <john.tobias.ph@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | imx6: add data configuration file for SPLJohn Tobias2014-11-13-0/+58
| | | | | | | | | | | | | | It's a trim version of mx6q_4x_mt41j128.cfg. It just removed the related settings for DDR Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
* | imx: mx6q/dlsabreauto: And NAND flash supportYe.Li2014-11-13-0/+66
| | | | | | | | | | | | | | | | | | | | | | The i.MX6Q/DL sabreauto board has one NAND socket, set the CONFIG_NAND_MXS and relevant NAND configurations to enable the MXS NAND flash driver. Add board level codes to set IOMUX and clock for GPMI-NAND and BCH module. Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx53loco: Change 'fdt_file' dynamicallyFabio Estevam2014-11-13-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel 3.15 there are two dtb's for the imx53-qsb board: imx53-qsb.dtb - For the boards with DA9053 PMIC imx53-qsrb.dtb - For the boards with MC34708 PMIC Change the 'fdt_file' dynamically, so that the correct dtb can be used depending on the board variant. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* | mx28evk: README: Revision C is also supportedFabio Estevam2014-11-12-1/+1
|/ | | | | | Adjust the text to mention that rev C of the board is also supported. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-6/+253
|\
| * imx: mx6 sabreauto: Add board support for USB EHCIYe.Li2014-11-03-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6 sabreauto board, there are two USB ports: 0: OTG 1: HOST The EHCI driver is enabled for this board, but the IOMUX and VBUS power control is not implemented, which cause both USB port failed to work. This patch fix the problem by adding the board support codes. Since the power control uses the GPIO pin from port expander MAX7310, the PCA953X driver is enabled for accessing the MAX7310. The ID pin of OTG Port needs to configure the GPR1 bit 13 for selecting its daisy chain. Add a new function "imx_iomux_set_gpr_register" to handle GPR register setting. Signed-off-by: Ye.Li <B37916@freescale.com>
| * imx: mx6slevk: Add support for USDHC1 and USDHC3 slotsYe.Li2014-11-03-6/+99
| | | | | | | | | | | | | | | | | | There are three SD/MMC sockets on mx6slevk boards. Implements the full support for them. The default boot socket is USDHC2, so the MMC environment is set to that device. Signed-off-by: Ye.Li <B37916@freescale.com>
| * mx6sabresd: Add Seiko WVGA panel supportFabio Estevam2014-10-30-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the 4.3'' Seiko WVGA parallel display. In order to direct the splash screen to the Seiko display: => setenv panel SEIKO-WVGA => save => reset Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-29-57/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2014-10-27-2/+2
|\ \
| * | powerpc: mpc5121ads: update board config info in READMEAnatolij Gustschin2014-10-27-2/+2
| | | | | | | | | | | | | | | | | | | | | The config targets described in README are not present any more, update the info to currently used targets. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2014-10-27-1/+61
|\ \ \ | |/ / |/| / | |/
| * mx6qsabreauto: Add HDMI supportFabio Estevam2014-10-21-1/+59
| | | | | | | | | | | | Let HDMI splash screen support work by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * ARM: i.MX: provide declaration for board_spi_cs_gpioEric Nelson2014-10-21-0/+2
| | | | | | | | | | | | | | | | Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | ls102x: Add support for secure boot and enable blob commandRuchika Gupta2014-10-16-0/+2
| | | | | | | | | | Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | ls102x: configs - Add hash command in freescale LS1 platformsRuchika Gupta2014-10-16-0/+20
|/ | | | | | | | | Hardware accelerated support for SHA-1 and SHA-256 has been added. Hash command enabled along with hardware accelerated support for SHA-1 and SHA-256 for platforms which have CAAM block. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2014-10-08-19/+713
|\ | | | | | | | | | | | | The single file conflict below is actually trivial. Conflicts: board/boundary/nitrogen6x/nitrogen6x.c
| * imx: mx6dlarm2: Add support for i.MX6Q/DL arm2 LPDDR2 boardsYe.Li2014-09-30-7/+510
| | | | | | | | | | | | | | | | Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2 arm2 board. Since the LPDDR2 arm2 board has different DDR size, use CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE. Signed-off-by: Ye.Li <B37916@freescale.com>
| * imx: mx6dlarm2: Add support for i.MX6DL arm2 DDR3 boardYe.Li2014-09-30-0/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. Signed-off-by: Ye.Li <B37916@freescale.com>
| * imx: ddr: Move mx6q_4x_mt41j128.cfg to mx6sabresd boardNitin Garg2014-09-22-0/+0
| | | | | | | | | | | | | | | | | | | | Provide cgtqmx6eval board its own variant of ddr setup config file. Move board/freescale/imx/ddr/ mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/ as this is was designed for the mx6sabresd board. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-09-22-324/+1674
| |\
| * | imx: Fix warning by building vf610twr_nandStefano Babic2014-09-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d6d07a9b... arm: vf610: add NAND support for vf610twr generates the following warnings: WARNING: no status info for 'vf610twr_nand' WARNING: no maintainers for 'vf610twr_nand'WARNING: no status info for 'vf610twr_nand' This is due to the fact that vf610twr_nand_defconfig has no Maintainer. This patch proposed Alison as Maintainer and fix it. Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Alison Wang <b18965@freescale.com> CC: Stefan Agner <stefan@agner.ch>
| * | mx6qsabreauto: Staticize when possibleFabio Estevam2014-09-16-8/+8
| | | | | | | | | | | | | | | | | | Turn all local symbols into static in order to make sparse happy. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit v1.1 at 2024-11-18 13:21:09 +0000