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* powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe codeKumar Gala2011-01-14-83/+26
| | | | | | | | | | | | Remove duplicated code in MPC8544DS board and utilize the common fsl_pcie_init_ctrl(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3 specially to setup the additional memory map region and we utilize a single LAW to cover the controller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe codeKumar Gala2011-01-14-111/+2
| | | | | | | | | Remove duplicated code in P2020DS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Rework MPC8572DS pci_init_board to use common FSL PCIe codeKumar Gala2011-01-14-89/+10
| | | | | | | | | Remove duplicated code in MPC8572DS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci: Add generic code to setup PCIe controllersKumar Gala2011-01-14-65/+2
| | | | | | | | | | | | | | | | | | Since all the PCIe controllers are connected over SERDES on the SoCs we can utilize is_serdes_configured() to determine if a controller is enabled. After which we can setup the ATMUs and LAWs for the controller in a common fashion and allow board code to specify what the controller is connected to for reporting reasons. We also provide a per controller (rather than all) for some systems that may have special requirements. Finally, we refactor the code used by the P1022DS to utilize the new generic code. Based on patch by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC8xxx DDR: align informational printsBecky Bruce2011-01-14-16/+18
| | | | | | | | | | | | | | | | | | | | Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: rename sdram_init() lbc_sdram_init()Becky Bruce2011-01-14-14/+6
| | | | | | | | sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-14-451/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Cleanup SGMII detection and reportingKumar Gala2011-01-14-58/+40
| | | | | | | | Use new is_serdes_configured to determine if TSECs are in SGMII mode and report that on the various boards that use or can be configured in SGMII mode in board_eth_init() instead of in the PCI init code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configuredKumar Gala2011-01-14-28/+28
| | | | | | | Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for booting from NAND on MPC8572DSKumar Gala2011-01-14-2/+20
| | | | | | | | Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting from NAND. Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-09-9/+9
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of ../master into nextWolfgang Denk2010-12-16-530/+57
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| * p1022ds: fix switching of DIU/LBC signalsTimur Tabi2010-12-13-10/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the P1022, the pins which drive the video display (DIU) are muxed with the local bus controller (LBC), so if the DIU is active, the pins need to be temporarily muxed to LBC whenever accessing NOR flash. The code which handled this transition is checking and changing the wrong bits in PMUXCR. Also add a follow-up read after a write to NOR flash if we're going to mux back to DIU after the write, as described in the P1022 RM. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * video: move fsl_diu_fb driver to drivers/videoAnatolij Gustschin2010-12-01-514/+0
| | | | | | | | | | | | | | | | | | Since the driver is used not only on Freescale boards, we move it to a common place for video drivers as suggested by Wolfgang. The patch also cleans up the top level Makefile. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * hwconfig: Fix dummy initialization of {board, cpu}_hwconfigKumar Gala2010-11-30-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since board_hwconfig & cpu_hwconfig are defined as weak and dont have a default value they will get put into the BSS if they aren't defined elsewhere. This is problematic as we try to utilize hwconfig before we've relocated and thus BSS isn't setup. Instead of giving dummy values in the board files that utilize this feature, we can just initialize the variables to an empty string and thus move them out of the BSS if they aren't defined elsewhere. Also made board_hwconfig & cpu_hwconfig arrays to reduce size associated with string pointers vs arrays. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | do_reset: unify duplicate prototypesMike Frysinger2010-11-28-4/+0
|/ | | | | | | The duplication of the do_reset prototype has gotten out of hand, and they're not all in sync. Unify them all in command.h. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 74xx_7xx: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-133/+0
| | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* 512x: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-2/+2
| | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Timur Tabi <timur@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-121/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* mpc85xx: Fix SERDES/eTSEC message indentationPeter Tyser2010-11-14-13/+13
| | | | | | | | | | | | | Previously some mpc85xx boards printed indented messages such as the following on bootup: printf(" eTSEC4 is in sgmii mode.\n"); printf(" Serdes2 disalbed\n"); The bootup appearance looks cleaner if the indentation is removed which aligns these messages with other bootup output. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: galak@kernel.crashing.org
* fsl: Clean up printing of PCI boot infoPeter Tyser2010-11-14-107/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org
* powerpc/corenet_ds: display the RCW at bootTimur Tabi2010-11-12-0/+15
| | | | | | | | | | | | | | | Display the 64-byte Reset Configuration Word (RCW) during boot, so that there's no confusion as to what RCW U-boot is using. Reset Configuration Word (RCW): 00000000: 4a500000 00000000 18181818 00008888 00000010: 28402400 00002000 fe800000 01200000 00000020: 00000000 00000000 00000000 000b0000 00000030: 00000000 00000000 00000000 00000000 Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p1_p2_rdb: to set SQW/INT pin of RTC as INT linePriyanka Jain2010-11-12-1/+3
| | | | | | | | | | SQW/INT pin in RTC can be used for generating square wave(by default) or as interrupt line. U-boot is registering this pin for interrupts. Configuring SQW/INT bit as interrupt line during board initialization to avoid spurious interrupts generated by square wave. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mx51evk: support new relocation schemeShawn Guo2010-10-28-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to fix build breakage and support new relocation scheme for mx51evk. - Correct IRAM base address and add size definition The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than 0x1FFE8000 which is for older revision. - Include imx-regs.h in mx51evk.h Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be referred to. - Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE They are used to define init RAM layout. - Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been buried by Wolfgang's commit below 25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
* mx51evk: Fix 2 hours reset issueShawn Guo2010-10-28-4/+4
| | | | | | | | | | | | | | | | | | | The mx51evk u-boot has an issue that system will get reset every 2 hours. MC13892 has an inside charge timer which expires in 120 minutes. If ICHRG and CHGAUTOB are not set properly, this timer expiration will get system power recycled. Since mx51evk has no Li-Ion battery on board, the patch sets ICHRG in externally powered mode and sets CHGAUTOB bit to avoid automatic charging, so that system will not get reset by this timer expiration. The patch also corrects the bit field definition of register 48 (Charger 0) per latest MC13892 Reference Manual. Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
* MX5:use common u-boot.lds of cpu layerJason Liu2010-10-28-1/+0
| | | | | | | | | | | | | | Remove u-boot.lds from mx5 and use the common u-boot.lds of cpu layer. This patch also fix the building errors: arch/arm/cpu/armv7/start.o: In function `_rel_dyn_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_start' arch/arm/cpu/armv7/start.o: In function `_rel_dyn_end_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_end' arch/arm/cpu/armv7/start.o: In function `_dynsym_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__dynsym_start' Signed-off-by: Jason Liu <r64343@freescale.com>
* 86xx: Create common linker scriptKumar Gala2010-10-20-265/+0
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8641hpcn: Update PCI codePeter Tyser2010-10-20-75/+22
| | | | | | | Update to use the recent, common FSL PCI initialization code. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Adding fixed sdram setting for cornet_ds boardYork Sun2010-10-20-17/+488
| | | | | | | | | | | | | | | 800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram setting. SPD based parameters and fixed parameters can be toggled by hwconfig. To use fixed parameters, hwconfig=fsl_ddr:sdram=fixed To use SPD parameters, hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add fdt_fixup_phy_connection helperKumar Gala2010-10-20-15/+12
| | | | | | | Add a common helper that will set the PHY connection type based on enum. We use this on eTSEC, UCC, and will with Fman in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-19-1/+1
|\ | | | | | | | | | | | | | | Conflicts: board/logicpd/imx31_litekit/config.mk boards.cfg Signed-off-by: Wolfgang Denk <wd@denx.de>
| * MX5: rename mx51 to mx5Jason Liu2010-10-18-1/+1
| | | | | | | | | | | | | | Rename mx51 to mx5 in order to support more mx51 like-style SOCs such as MX53 and the followings. Signed-off-by: Jason Liu <r64343@freescale.com>
* | MPC5121: Add USB EHCI supportDamien Dusha2010-10-18-1/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com> Signed-off-by: Damien Dusha <d.dusha@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Coding style cleanup; slight file restructuring. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* | config.mk cleanup: drop "-I$(TOPDIR)/board" entriesWolfgang Denk2010-10-18-30/+0
| | | | | | | | | | | | | | | | | | After the recent cleanups, a number of config.mk files consist only of a "PLATFORM_CPPFLAGS += -I$(TOPDIR)/board" entry whih is not needed. Remove such entries. In most cases, that means that the whole config.mk file can be removed. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk2010-10-18-596/+7
| | | | | | | | | | | | | | | | | | | | Clean up Makefile, and drop a lot of the config.mk files on the way. We now also automatically pick all boards that are listed in boards.cfg (and with all configurations), so we can drop the redundant entries from MAKEALL to avoid building these twice. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-18-77/+79
| | | | | | | | | | | | | | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mkconfig: change CONFIG_MK_ prefix into plain CONFIG_Wolfgang Denk2010-10-18-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When planning for more generalization and Makefile cleanup it became obvious that the introduction of a separate CONFIG_MK_ name space for config options that were set through scripting in the Makefile was not a good idea. Originally the idea was to provide a script-free approach to supply configuration options - there was no real need for a separate name space. But when we now convert the existing Makefile entries to make use of this approach, it would mean that we have to touch a large number of board config files and add #ifdef / #define sequences to "convert" from the CONFIG_MK_ to the CONFIG_ name space. It seems much cleaner to get rid of this somewhat arbitrary _MK string now for the few boards that actually use it. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | mpc83xx: fix 837x MDS PCI HOST buildKim Phillips2010-10-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9 "83xx: Remove warmboot parameter from PCI init functions" missed one mpc83xx_pcie_init callsite, causing this build error: Configuring for MPC837XEMDS_HOST board... pci.c: In function 'pci_init_board': pci.c:141: error: too many arguments to function 'mpc83xx_pcie_init' this patch extends the commit to include that callsite. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | MPC832XEMDS: fix pci.c build warningWolfgang Denk2010-10-18-3/+0
|/ | | | | | | | | Doubled use of DECLARE_GLOBAL_DATA_PTR caused compile warning: pci.c:71: warning: register used for two global register variables Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-10-17-0/+1
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| * Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-17-0/+1
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| | * mx51evk: add u-boot.imx to ALL targetLoic Minier2010-10-14-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Loic Minier <loic.minier@linaro.org> CC: stefano babic <sbabic@denx.de>
* | | Fix define for MPC5121 ADS board.mark.vels@team-embedded.nl2010-10-13-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h expects a define CONFIG_MPC5121ADS_REV2 for this. Therefore there are two defines used but only 1 is defined. This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2 to have one common define. This patch fixes faulty mem size detection caused by wrong config in include/configs/mpc5121ads.h Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-11-52/+0
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| * MX51: Drop unused header file for mx51evkStefano Babic2010-09-29-52/+0
| | | | | | | | | | | | | | | | | | As stated in 272017853339f5b9685f9488bdaf5405812d12a4, the mx51evk has not CPLD and all references must be removed. This patch drop a .h file that still remains in board directory. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | fsl: add support for NXID v1 EEPROM formatTimur Tabi2010-10-07-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale application note AN3638 describes an update to the NXID format, which stores MAC addresses and related data on an on-board EEPROM. The new version adds support for up to 23 MAC addresses, instead of just 8. Since the initial implementation of NXID had a "0" in the 'version' field, this new version is called "v1". Boards that are shipped with EEPROMs in the NXID v1 format should define CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-07-1/+27
| | | | | | | | | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl: verify writes to the MAC address EEPROMTimur Tabi2010-10-07-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-07-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8569mds: fix some ddr settingsHaiying Wang2010-10-07-3/+13
| | | | | | | | | | | | | | Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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