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| * | armv8/ls1043aqds: Add support for >2GB memoryShaohui Xie2016-01-25-3/+26
| | | | | | | | | | | | | | | | | | | | | This patch also exposes the complete DDR region(s) to Linux. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-25-66/+28
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| * | | powerpc/board/t4240rdb: Enable VID supportYing Zhang2016-01-25-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | board/freescale/common: Check IR chip mode for VID supportYing Zhang2016-01-25-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IR chip on all the boards are required to be used in Intel mode to support VID. VDD will not be adjusted if IR chip is used in other modes. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seqPrabhakar Kushwaha2016-01-25-65/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | imx: mx7dsabresd: support nandPeng Fan2016-01-24-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinmux settings. Add related macro definitions. Nand pin conflicts with emmc, so if want to enable nand, need to do hardware rework. After hardware rework, define CONFIG_NAND_MXS in board header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* | | mx25pdk: Remove lowlevel_init.S fileFabio Estevam2016-01-24-11/+3
|/ / | | | | | | | | | | | | | | As the lowlevel_init function is empty we should better remove this assembly file entirely and use a dummy C function instead. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* | m68k: M54418TWR: drop board/freescale/m54418twr/config.mkMasahiro Yamada2016-01-20-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
* | m68k: move CONFIG_SYS_TEXT_BASE to defconfig filesMasahiro Yamada2016-01-20-108/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For historical reason, CONFIG_SYS_TEXT_BASE has been specified in various ways: [1] by board/${VENDOR}/${BOARD}/config.mk [2] by CONFIG_SYS_EXTRA_OPTIONS (This was "options" field of boards.cfg before Kconfig conversion) [3] by include/configs/${BOARD}.h [4] by configs/${BOARD}_defconfig Most of M68K boards use either [1] or [2], both of which we want to deprecate. Switch them into [4], which is the newest way (Kconfig). We still allow [3] too, because it is still used by many boards and we expect much time for conversion. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Add more SPDX-License-Identifier tagsTom Rini2016-01-19-69/+23
| | | | | | | | | | | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-13/+13
| | | | | | | | | | | | | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | block: pass block dev not num to read/write/erase()Stephen Warren2016-01-13-1/+1
|/ | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* MAINTAINERS/mailmap: Update my email addressFabio Estevam2016-01-11-8/+8
| | | | | | Update my email address to the NXP account. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-08-35/+4
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| * pfuze: Fix unsigned variable for less-than-zero comparisonYe.Li2016-01-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | According to the Coverity result, a unsigned int variable is used fo less- than-zero comparison, the result is never true. Need to fix the variable type to signed int. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * mx6sabresd: Simplify the Ethernet PHY configurationFabio Estevam2016-01-07-34/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per the AR8031 datasheet: "For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied." So do as suggested and also add a 100us delay after deasserting the reset line to guarantee that the PHY ID can be read correctly and the Atheros 8031 PHY driver can be loaded automatically. This results in a simpler code. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | MAINTAINERS, .mailmap: Update my email addressYork Sun2016-01-08-2/+2
|/ | | | | | Change from yorksun@freescale.com to york.sun@nxp.com. Signed-off-by: York Sun <york.sun@nxp.com>
* qemu-ppce500: pass 'range_id' around in pci_map_regionMiao Yan2016-01-04-1/+1
| | | | | | | | | | In pci_map_region(), pass 'range_id' to fdt_read_range(), otherwise the same address will be mapped again in other calls to pci_map_region() Signed-off-by: Miao Yan <yammiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-6/+91
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| * imx: mx6qsabreauto: support lvds displayPeng Fan2016-01-03-3/+84
| | | | | | | | | | | | | | | | | | | | | | Move setup_display from board_early_init_f to board_init. Add more clock settings. Add blacklight iomux setting. Add display_info_t info for the lvds screen. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mx6sxsabresd: Fix Ethernet PHY reset sequenceFabio Estevam2015-12-07-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. Fix this by calling enable_fec_anatop_clock() earlier and also by adding a 10ms reset delay as recommended in the AR8031 datasheet. Suggested-by: Jörg Krause <joerg.krause@embedded.rocks> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | armv8/ls1043aqds/rcw: change core frequency to 1600MHzMingkai Hu2015-12-17-4/+4
| | | | | | | | | | | | | | Change RCW for SD boot and NAND boot. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043ardb/rcw: change core frequency to 1600MHzMingkai Hu2015-12-17-4/+4
| | | | | | | | | | | | | | Change RCW for SD boot and NAND boot. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043ardb: add SECURE BOOT target for NORAneesh Bansal2015-12-15-13/+44
| | | | | | | | | | | | | | | | | | | | LS1043ARDB Secure Boot Target from NOR has been added. - Configs defined to enable esbc_validate. - ESBC Address in header is made 64 bit. - SMMU is re-configured in Bypass mode. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: fsl-layerscale: Rewrite reserving memory for MC and debug serverYork Sun2015-12-15-51/+0
| | | | | | | | | | | | | | | | | | | | | | MC and debug server are not board-specific. Move reserving memory to SoC file, using the new board_reserve_ram_top function. Reduce debug server memory by 2MB to make room for secure memory. In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation. Signed-off-by: York Sun <yorksun@freescale.com>
* | armv8: fsl-layerscape: Make DDR non secure in MMU tablesYork Sun2015-12-15-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR has been set as secure in MMU tables. Non-secure master such as SDHC DMA cannot access data correctly. Mixing secure and non- secure MMU entries requirs the MMU tables themselves in secure memory. This patch moves MMU tables into a secure DDR area. Early MMU tables are changed to set DDR as non-secure. A new table is added into final MMU tables so secure memory can have 2MB granuality. gd->secure_ram tracks the location of this secure memory. For ARMv8 SoCs, the RAM base is not zero and RAM is divided into several banks. gd->secure_ram needs to be maintained before using. This maintenance is board-specific, depending on the SoC and memory bank of the secure memory falls into. Signed-off-by: York Sun <yorksun@freescale.com>
* | arm: ls1021a: merge SoC specific code in a separate fileYao Yuan2015-12-13-87/+4
| | | | | | | | | | | | | | Create a soc.c file to put the code for soc special settings. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043ardb: Add support for >2GB memoryShaohui Xie2015-12-13-1/+18
| | | | | | | | | | | | | | | | This patch also expose the complete DDR region(s) to Linux. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | freescale: fman: make sure phy-handle property is big endianShaohui Xie2015-12-13-0/+2
| | | | | | | | | | | | | | | | | | | | When creating phy-handle property, an unsigned int value is created by fdt_create_phandle, and memcpy is used to get the value, since DTS is big endian, the value cannot be used directly on little endian SoCs, it should be converted by cpu_to_fdt32. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls2080ardb: Update DDR settings for four chip-select caseYork Sun2015-12-13-4/+12
| | | | | | | | | | | | | | When 4 chip-selects are used, vref should use range 1 and CDT uses 80 ohm, and 2T timing is enabled. Signed-off-by: York Sun <yorksun@freescale.com>
* | armv8/ls2080aqds: Update DDR settings for four chip-select caseYork Sun2015-12-13-4/+12
| | | | | | | | | | | | | | When 4 chip-selects are used, vref should use range 1 and CDT uses 80 ohm, and 2T timing is enabled. Signed-off-by: York Sun <yorksun@freescale.com>
* | imx: mx7dsabresd: Add QSPI supportPeng Fan2015-12-11-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support qspi flashes for mx7dsabresd 1. introduce pin mux settings 2. enable qspi clock 3. introduce related macro definitions Default QSPI is not enabled, since we need hardware rework to use QSPI, see SPF-28590, page 9: " QSPI signals are muxed with EPDC_D[7:0] When using QSPI: de-populate R388-R391, R396-R399 populate R392-R395, R299, R300 " After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi flashes can be deteced and read/erase/write. Log info: " => sf probe SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB => sf read 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Read: OK => sf erase 0 0x4000000 SF: 67108864 bytes @ 0x0 Erased: OK => sf write 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Written: OK " Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | board/ls2080qds: Fix typo in README for QSGMII riser cardPrabhakar Kushwaha2015-11-30-1/+1
| | | | | | | | | | | | | | | | | | | | DPMACx to PHY mapping for SGMII is mentioned as QSGMII. So fix typo in README for QSGMII rise card. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Change from ls2085aqds to ls2080aqds] Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043ardb: add USB supportGong Qianyu2015-11-30-0/+16
| | | | | | | | | | | | | | Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-30-0/+1235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-113/+126
| | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
* | driver: net: fsl-mc: Create DPAA2 object at run-timePrabhakar Kushwaha2015-11-30-2/+8
| | | | | | | | | | | | | | | | | | | | Freescale's DPAA2 ethernet driver depends upon the static DPL for the DPRC, DPNI, DPBP, DPIO objects. Instead of static objects, Create DPNI, DPBP, DPIO objects at run-time. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: ls2085aqds: Print function name during SerDes errorPrabhakar Kushwaha2015-11-30-8/+8
|/ | | | | | | | Print function name along with SerDes Protocol during SerDes Protocol not supported error. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+13
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* imx: mx7dsabresd: support lcdifPeng Fan2015-11-12-0/+64
| | | | | | | | | | | Support LCDIF for mx7dsabresd board: 1. Add pinmux settings 2. Add VIDEO related macro definition and videomode env settings. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com>
* imx: mx6ul_14x14_evk: support lcdif displayPeng Fan2015-11-12-0/+63
| | | | | | | | | | | | | Support lcdif display: 1. Add pinmux and pad settings for LCDIF 2. Introduce setup_lcd to do the settings for LCDIF 3. Enable VIDEO related macros in board header files 4. Add a new env videomode which is needed by mxsfb.c. The settings for videomode in this patch is for TFT43AB. 5. Tested on mx6ul 14x14/9x9 evk. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* mx6ul_14x14_evk: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6sxsabresd: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6slevk: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6sabresd: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* Merge git://git.denx.de/u-bootStefano Babic2015-11-12-253/+944
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| * ls1043ardb: Add missing config entries to MAINTAINERSFabio Estevam2015-11-10-0/+2
| | | | | | | | | | | | | | | | | | ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing in the MAINTAINERS file, so add them for completeness. Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter CardYangbo Lu2015-11-02-0/+3
| | | | | | | | | | | | | | | | | | When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable EVDD automatic control via SDHC_VS. This could support SD card IO voltage switching for UHS-1 speed mode. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter CardYangbo Lu2015-11-02-0/+2
| | | | | | | | | | | | | | | | If adapter card type identification is supported for platform, we would enable dat[4:7] for eMMC4.5 Adapter Card. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-12 21:24:00 +0000