| Commit message (Collapse) | Author | Age | Lines |
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MX35 can't boot due to wrong frequency setting.
Signed-off-by: Terry Lv <r65388@freescale.com>
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In current u-boot design,
get_timer_masked is not correct and udelay is not accurate
when the time is less than 1000us.
Thus we need to use ipg clock source for accurate timer.
Signed-off-by: Terry Lv <r65388@freescale.com>
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To enable MMU, it is porting from redboot.
Enable MMU and enable I/D cache.
Signed-off-by:Fred Fan <r01011@freescale.com>
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No 'boot up from' information when booting from NOR-SPI.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Update the priority list for MX25 MAX xbar.
Signed-off-by: Sammy He <r62914@freescale.com>
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1. Add imx cspi support for cpld access.
2. Add smc911x ethernet support from cpld.
Signed-off-by: Sammy He <r62914@freescale.com>
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This patch will fix three issues:
1. Add boot device detection.
2. Use right nand command in anroid for recovery mode.
3. Recovery mode code clean.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Misc changes for v2009.08 upgrade.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Workaround for ARM errata ID #468414, This erratum is
referenced in ARM Core Cortex-A8 Errata Notice [1], ID 468414.
Signed-off-by:Jason Liu <r64343@freescale.com>
(cherry picked from commit 549c17b69a5052c61a979ba679bd1dbd33a4153d)
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PATA support in u-boot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add mx51 bbg to3 support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Syc clock and l2cc code with redboot.
Signed-off-by: Terry Lv <r65388@freescale.com>
(cherry picked from commit f712613010e3bf2c186f05a1b7381483d733b925)
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Signed-off-by: Terry Lv <r65388@freescale.com>
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U-BOOT upgrade from V2009.01 to V2009.08
Initial version for i.MX51 BBG board.
Support:
FEC, SPI, spi Nor Flash
Boot from spi nor flash and mmc/sd
Signed-off-by:Fred Fan <r01011@freescale.com>
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I2C support for mx51 3ds board.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Recovery mode support for Android on mx51.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Copy babbage settings to 3stack
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Update mach-types for BBG board.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Support MMC/SD boot in uboot, however, it is disabled default and
user needs to enable manually by changing mx25_3stack.h;
2. Enable dhcp for network.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add MMC configs to mx35 3stack config file.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Remove Watchdog disable codes in MX51 uboot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add FEC support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2, enable SPI NOR and MMC in one image.
Signed-off-by: Terry Lv <r65388@freescale.com>
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spi nor boot support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
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BBG2: MMC boot support.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Basic boot on BBG2 board.
Signed-off-by: r65388 <r65388@freescale.com>
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These patches add functional support to iMX25PDK.
Currently only the internal FEC is supported.
Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
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Support i.MX51 TO2.0 3stack board. And enable LAN9217 support.
NAND is not supported in this patch.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Modify and Verfiy MX31 & MX35 3stack according to the changes in V2009.01
Signed-off-by: Fred Fan <r01011@freescale.com>
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uboot can not boot kernel.
There are no more messages excepts uncompression message.
The root cause is wrong romfile version offset.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Check Soc version
2. Check Board version based on TO2 pmic chip version.
3. Based on soc version, skips To1 workaround code
4. based on board version, enables FEC power and select pin mux.
Signed-off-by: Fred Fan <r01011@freescale.com>
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1. Support boot from NAND
Changes link script to separate initial code to multiple sections.
2. One binary support boot from NOR and NAND
Changes common file start.S to support multiple sections.
Signed-off-by: Fred Fan <r01011@freescale.com>
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Add nand driver for mx35
Signed-off-by:Jason Liu <r64343@freescale.com>
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Support boot from NAND Flash
Add driver for i.MX31 NFC
Upgate U-Boot to support NAND boot
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Support boot from NOR flash
Support Multiple ethernet:LAN9217 and FEC
Support upgrade u-boot
Signed-off-by: Fred Fan <r01011@freescale.com>
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Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
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Update serial boot DRAM's Internal RAM, vector table and DRAM in
start.S, serial flash's read status command over SPI and NOR
flash.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
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"All Rights Reserved" conflicts with the GPL.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
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All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
- cleaned up line lengths
- modified all boards that override weak function in this driver
- added
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
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The pixis code used in8/out8 all over the place. Replace it with
in_8/out_8 macros.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The MPC8641HPCN board is capable of swizzling the upper address bit of
the NOR flash we boot out of which creates the concept of "virtual"
banks. This is useful in that we can flash a test of image of u-boot
and reset to one of the virtual banks while still maintaining a
working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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So far the console API uses the following naming convention:
======Extract======
typedef struct device_t;
int device_register (device_t * dev);
int devices_init (void);
int device_deregister(char *devname);
struct list_head* device_get_list(void);
device_t* device_get_by_name(char* name);
device_t* device_clone(device_t *dev);
=======
which is too generic and confusing.
Instead of using device_XX and device_t we change this
into stdio_XX and stdio_dev
This will also allow to add later a generic device mechanism in order
to have support for multiple devices and driver instances.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Since we have simple hwconfig interface now, we don't need
pci_external_arbiter variable any longer.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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This patch simply converts the board to the hwconfig infrastructure.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.
Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).
FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify 'esdhc' or 'dr_usb' options
in the hwconfig environment variable to choose between the
devices.
p.s.
Now we're very close to a monitor len limit (196 bytes left using
gcc-4.2.0), so also increase the monitor len by one sector (64 KB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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