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* Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-17-0/+1
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| * mx51evk: add u-boot.imx to ALL targetLoic Minier2010-10-14-0/+1
| | | | | | | | | | Signed-off-by: Loic Minier <loic.minier@linaro.org> CC: stefano babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-11-52/+0
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| * MX51: Drop unused header file for mx51evkStefano Babic2010-09-29-52/+0
| | | | | | | | | | | | | | | | | | As stated in 272017853339f5b9685f9488bdaf5405812d12a4, the mx51evk has not CPLD and all references must be removed. This patch drop a .h file that still remains in board directory. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | fsl: add support for NXID v1 EEPROM formatTimur Tabi2010-10-07-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale application note AN3638 describes an update to the NXID format, which stores MAC addresses and related data on an on-board EEPROM. The new version adds support for up to 23 MAC addresses, instead of just 8. Since the initial implementation of NXID had a "0" in the 'version' field, this new version is called "v1". Boards that are shipped with EEPROMs in the NXID v1 format should define CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-07-1/+27
| | | | | | | | | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl: verify writes to the MAC address EEPROMTimur Tabi2010-10-07-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-07-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8569mds: fix some ddr settingsHaiying Wang2010-10-07-3/+13
| | | | | | | | | | | | | | Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8569mds: fix consuming long time while relocating code.Haiying Wang2010-10-07-5/+36
| | | | | | | | | | | | | | | | | | | | | | | | The original code maps boot flash as non-cacheable region. When calling relocate_code in flash to copy u-boot from flash to ddr, every loop copy command is read from flash. The flash read speed will be the bottleneck, which consuming long time to do this operation. To resovle this, map the boot flash as write-through cache via tlb. And set tlb to remap the flash after code executing in ddr, to confirm flash erase operation properly done. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | p1022ds: use weak CFI flash accessors when DIU is enabledTimur Tabi2010-09-25-7/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Freescale P1022, the DIU and the LBC share address pins, which means that when the DIU is active (e.g. the console is on the DVI display), NOR flash cannot be accessed. So we use the weak accessor function feature of the CFI flash code to temporarily switch the pin mux from DIU to LBC whenever we want to read or write flash. This has a significant performance penalty, but it's the only way to make it work. This change allows the 'saveenv' command to work when the video display is enabled. Erasing flash and writing to flash (with the 'cp' command) works, but reading from flash (with the 'md' and 'cp' commands) does not. Also, while flash is being written, the video display will be blank. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | p1022ds: add video supportTimur Tabi2010-09-25-0/+112
| | | | | | | | | | | | | | | | Add support for the DIU controller. If CONFIG_VIDEO is defined, then the console will appear on a DVI monitor instead of the serial port. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-25-123/+51
|/ | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-30/+20
| | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC8308RDB: various clean upsIlya Yanok2010-09-23-46/+5
| | | | | | | | | | | | | | | | | | This patch cleans up the Freescale MPC8308RDB Development board support. Things fixed: - Removed unused PCIE2 definitions from configuration - SICR{L,H} defines used for System I/O Configuration Registers values instead of hardcoding - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of writing to SCCR from the board code - sleep mode stuff removed as MPC8308 has no support for deep sleep and PMCCR1 register. board_early_init_f() removed. - MPC8308 has no ERRATA for DDR controller so workaround removed - 'assignment in if statement' issues solved - use LBLAWAR_* defines instead of hardcoding Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo ↵Timur Tabi2010-09-21-1087/+26
| | | | | | | | | | features The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
* Fix parameters to support RDIMM for P2020DSYork Sun2010-08-31-2/+2
| | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix SRIO LAW setup on corenet_ds boardsLian Minghuan2010-08-19-22/+25
| | | | | | | | | | | | | In function board_early_init_r(), serdes will not be initialize yet. Thus sRIO was always considered disabled. Move the check for sRIO into misc_init_r() which is called after fsl_serdes_init(). Also, fixed warning associated with gur variable possibly not being used. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Lian Minghuan <B31939@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.york2010-08-19-1/+17
| | | | | | | | | The board specific parameters associated with quad rank dimms where missing. This fixes it so the board will function if quad rank dimms are placed in it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* net ppc: fix ethernet device names with spacesHeiko Schocher2010-08-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | since commit 1384f3bb8a4f9066805b70c1418eda78ecb73fdd ethernet names with spaces drop a Warning: eth device name has a space! message. This patch fix it for: - "FEC ETHERNET" devices found on mpc512x, mpc5xxx, mpc8xx and mpc8220 boards. renamed to "FEC". - "SCC ETHERNET" devices found on mpc8xx, mpc82xx based boards. Renamed to "SCC". - "HDLC ETHERNET" devices found on mpc8xx boards Renamed to "HDLC" - "FCC ETHERNET" devices found on mpc8260 and mpc85xx based boards. Renamed to "FCC" Tested on the kup4k board. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* powerpc/p4080: Add support for the P4080DS boardKumar Gala2010-08-01-0/+800
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the P4080DS board, with the following features: * 36-bit only * Boots from NOR flash * FMAN drivers NOT supported * SPD DDR initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfigyork2010-07-26-31/+32
| | | | | | | | Enabled SPD Enabled DDR2 Enabled hwconfig Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york2010-07-26-0/+2
| | | | | | | | | Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual rank with 512MB each rank. Also check dimm size and rank size for memory controller interleaving Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DSyork2010-07-26-4/+4
| | | | | | | If 36-bit is enabled, move INIT_RAM_ADDR physical address higher to free lowest 4GB address space. Signed-off-by: York Sun <yorksun@freescale.com>
* cmd_usage(): simplify return code handlingWolfgang Denk2010-07-24-8/+4
| | | | | | | | | | | | | | | | Lots of code use this construct: cmd_usage(cmdtp); return 1; Change cmd_usage() let it return 1 - then we can replace all these ocurrances by return cmd_usage(cmdtp); This fixes a few places with incorrect return code handling, too. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-20-116/+22
| | | | | | | | | | | Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641Kumar Gala2010-07-20-38/+38
| | | | | | | | The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-20-2/+2
| | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move p1022ds slot code into board fileKumar Gala2010-07-16-0/+69
| | | | | | | | The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Convert MPC8536DS to using board common ICS307 codeKumar Gala2010-07-16-148/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Convert MPC8572DS to using board common ICS307 codeKumar Gala2010-07-16-144/+2
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+542
| | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-55/+37
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Move ICS CLK chip frequency calculation code into a common board libraryKumar Gala2010-07-16-149/+119
| | | | | | | | | | | | We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it. Convert the P2020DS board as the first to use the new common ICS307 code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
* ppc/85xx: Add a structure defn for PIXIS registersKumar Gala2010-07-16-1/+183
| | | | | | | | | | | | | The various boards that have PIXIS FPGAs have slightly different register definitions, however there is some common functionality (like reset, ICS307 clk control, etc) that can be shared. The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS, MPC8610HPCD, and MPC8641HPCN boards. Also fixed ngpixis to be __packed__ instead of aligned. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC8308RDB: minimal support for devboard from FreescaleIlya Yanok2010-07-09-0/+339
| | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308RDB development board from Freescale with a minimal set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported The following features are enabled in configuration but not fully tested: I2C (used to get the board revision) I2C-connected RTC VSC7385 switch There is one (hopefully) minor issue: on soft reset the board sometimes resets twice. I've not managed to find the fix for this problem yet. As a workaround instruction cache can be disabled. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' into nextWolfgang Denk2010-06-30-4/+14
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| * 85xx/p1_p2_rdb: Added RevD board version supportPoonam Aggrwal2010-06-29-3/+13
| | | | | | | | | | | | | | | | - Also modified the code to use io accessors. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHzPoonam Aggrwal2010-06-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | Use a slighly larger value of CLK_CTRL for DDR at 667MHz which fixes random crashes while linux booting. Applicable for both NAND and NOR boot. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* | video: cfb_console: add weak default video_set_lut()Anatolij Gustschin2010-06-14-9/+0
|/ | | | | | | | | Do not enforce drivers to provide empty video_set_lut() if they do not implement indexed color (8 bpp) frame buffer support. Add default function to the cfb_console driver and remove empty video_set_lut() functions. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structureTimur Tabi2010-05-30-1/+1
| | | | | | | | | | The ngPIXIS is a board-specific FPGA, but the definition of the registers is mostly consistent. On boards where it matter, register 9 is called 'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t definition. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Convert Makefiles from COBJS-${} to COBJS-$()Kumar Gala2010-05-26-12/+12
| | | | | | Match style we use almost everywhere else Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-05-21-2/+141
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| * Add SPI support to mx51evk boardStefano Babic2010-05-05-0/+139
| | | | | | | | | | | | | | The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * MX51evk: Removed warningsStefano Babic2010-05-05-2/+2
| | | | | | | | | | | | | | Changes reflect modifications in the fsl_esdhc driver (the clk_enable field war removed in the configuration structure). Signed-off-by: Stefano Babic <sbabic@denx.de>
* | fsl_diu_fb.c: fix build warningsWolfgang Denk2010-05-17-9/+9
| | | | | | | | | | | | | | | | | | | | | | Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a number of "passing argument 2 of 'out_be32' makes integer from pointer without a cast" warnings; fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dave Liu <daveliu@freescale.com> Cc: Jerry Huang <Chang-Ming.Huang@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org>
* | 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabledKumar Gala2010-05-12-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code. Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabledKumar Gala2010-05-12-12/+29
| | | | | | | | | | | | | | | | | | | | | | | | The new is_serdes_configured covers a broader range of devices than the PCI specific code. Use it instead as we convert away from the is_fsl_pci_cfg() code. Additionally move to setting LAWs for PCI based on if its configured. Also updated PCI FDT fixup code to remove PCI controllers from dtb if they are configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl-diu: Using I/O accessor to CCSR spaceJerry Huang2010-05-12-27/+28
|/ | | | | | | | | | | | | Using PPC I/O accessor to DIU I/O space instead of directly read/write. It will prevent the dozen of compiler order issue and PPC hardware order issue for accessing I/O space. Using the toolchain(tc-fsl-x86lnx-e500-dp-4.3.74-2.i386.rpm) can show up the order issue of DIU driver. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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