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* i.MX6: mx6q_sabrelite: add SATA bindingsEric Nelson2012-05-15-0/+31
| | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: stefano Babic <sbabic@denx.de>
* mx28evk: add NAND supportLauri Hintsala2012-05-15-0/+21
| | | | | | | | NAND support is not enabled by default because Eval Kit is not delivered with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config. Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Acked-by: Marek Vasut <marex@denx.de>
* mx53loco: Add support for 1GHz operation for DA9053-based boardsFabio Estevam2012-05-15-0/+71
| | | | | | | | | | | | | | | There are two types of mx53loco boards: initial boards were built with a Dialog DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC. Add DA9053 PMIC support and adjust the required voltages and clocks for running the CPU at 1GHz. Tested on both versions of mx53loco boards. In the case of a MC34708-based board the CPU operating voltage remains at 800MHz. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by : Stefano Babic <sbabic@denx.de>
* mx53loco: Allow to print CPU information at a later stageFabio Estevam2012-05-15-0/+22
| | | | | | | | | | | Print CPU information within board_late_init(). This is in preparation for adding 1GHz support, which requires programming a PMIC via I2C. As I2C is only available after relocation, print the CPU information later at board_late_init(), so that the CPU frequency can be printed correctly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flowEric Nelson2012-05-15-2/+120
| | | | | | | | | Uses the 'magic_keys' idiom as described in doc/README.kbd: http://lists.denx.de/pipermail/u-boot/2012-April/122502.html Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6qsabrelite: No need to set the direction for GPIO3_23 againFabio Estevam2012-05-15-1/+1
| | | | | | | | | | There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is already established. Use gpio_set_value() for changing the GPIO output then. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* MX53: mx53loco: Add SATA supportStefano Babic2012-05-15-0/+3
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during bootTimur Tabi2012-04-24-52/+9
| | | | | | | | | | | | | | | | Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes displays which of these is actually built, but it's inconsistent. This is especially problematic since the "default" build for a given 85xx board can be either one, so if you don't see a message, you can't always know which size is being used. Not only that, but each board includes code that displays the message, so there is duplication. The 'bdinfo' command has been updated to display this information, so we don't need to display it at boot time. The board-specific code is deleted. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/corenet_ds: Slave uploads ucode when boot from SRIOLiu Gang2012-04-24-0/+14
| | | | | | | | | | | | | | | | | When boot from SRIO, slave's ucode can be stored in master's memory space, then slave can fetch the ucode image through SRIO interface. For the corenet platform, ucode is for Fman. Master needs to: 1. Put the slave's ucode image into it's own memory space. 2. Set an inbound SRIO window covered slave's ucode stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* powerpc/corenet_ds: Slave module for boot from SRIOLiu Gang2012-04-24-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. 5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode locally. For the slave module, need to finish these processes: 1. Set the boot location to SRIO1 or SRIO2 by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot. 4. Slave's u-boot image should be generated specifically by make xxxx_SRIOBOOT_SLAVE_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boardsYork Sun2012-04-24-5/+5
| | | | | | | | | P1010RDB and p1_pc_rdb_pc has incorrect configuration for CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING. Incorrect setting causes DDR failure in case of SPD absent. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1023rds: Disable nor flash node and enable nand flash nodeChunhe Lan2012-04-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the p1023rds, when system boots from nor flash, kernel only accesses nor flash and can not access nand flash with BR0/OR0; when system boots from nand flash, kernel only accesses nand flash and can not access nor flash with BR0/OR0. Default device tree nor and nand node should have the following structure: Example: nor_flash: nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x02000000>; bank-width = <2>; device-width = <1>; status = "okay"; partition@0 { label = "ramdisk"; reg = <0x00000000 0x01c00000>; }; } nand_flash: nand@1,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p1023-fcm-nand", "fsl,elbc-fcm-nand"; reg = <0x2 0x0 0x00040000>; status = "disabled"; u-boot-nand@0 { /* This location must not be altered */ /* 1MB for u-boot Bootloader Image */ reg = <0x0 0x00100000>; read-only; }; } When booting from nor flash, the status of nor node is enabled and the status of nand node is disabled in the default dts file, so do not do anything. But, when booting from nand flash, need to do some operations: o Disable the NOR node by setting status = "disabled"; o Enable the NAND node by setting status = "okay"; Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* i.MX6: arm2: Add AXI cache and Qos settingDirk Behme2012-04-17-0/+6
| | | | | | | | | | | | | | | Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Chen <b02280@freescale.com> CC: Jason Liu <r64343@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <festevam@gmail.com> Acked-by: Jason Liu <r64343@freescale.com>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-28/+28
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MX35: mx35pdk: wrong board revisionStefano Babic2012-04-16-11/+0
| | | | | | | | | | | | | | | | | | | The board revision is detected accessing to the pmic, that is not available before relocation (I2C). This generates the following error: CPU: Freescale i.MX35 rev 2.0 at 532 MHz. Reset cause: WDOG <reg num> = 7 is invalid. Should be less than 0 Board: MX35 PDK 1.0 The revision number is wrong, as a default value is printed (tested on a mx35pdk Rev. 2.0). Move the output in the board_late_init(), when pmic can be accessed. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: mx31pdk: drop enable_caches from board fileStefano Babic2012-04-16-8/+0
| | | | | | | | | enable_caches() is implemented now in cpu.c for ARM1136. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX53: DDR: Fix ZQHWCTRL field TZQ_CSTroy Kisky2012-04-16-4/+4
| | | | | | | | | Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x02 - 128 cycles. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53ard: Initialize return code with errorFabio Estevam2012-03-27-1/+1
| | | | | | | | | The variable "rc" is the return of board_eth_init() function. Initialize it with an error code, so that this function can return an error when CONFIG_SMC911X is not set. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAGEric Nelson2012-03-27-0/+5
| | | | | | | | | | | | | | This is needed to support Freescale-supplied userspaces. At the moment, both the IPU and VPU libraries provided by Freescale in the "imx-lib" package contain routines which scrape the system revision from /proc/cpuinfo. In the VPU library, this information is used to load the proper firmware, allowing a single binary to be used across various i.MX processors. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use ↵Eric Nelson2012-03-27-4/+4
| | | | | | for environment Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6qsabrelite: add and enable USB Host 1 supportWolfgang Grandegger2012-03-26-0/+18
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx6q: mx6qsabrelite: Update the network configurationTroy Kisky2012-02-27-33/+14
| | | | | | | | | | | | | | | | | | | Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* net: phy: make board_phy_config responsible for calling drv->configTroy Kisky2012-02-27-0/+4
| | | | | | | | | Boards may have things they want done before or after normal phy config. Letting the boards call drv->config allows them more flexibilty. Boards affected by this change are corenet_ds and mpc8544ds. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* mx35pdk: Remove duplicate CPU revision and reset cause informationFabio Estevam2012-02-27-26/+1
| | | | | | | MX35PDK board does not need to print CPU revision and reset cause in board file because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx51evk: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+2
| | | | | | Use gpio_direction_input prior to gpio_get_value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53smd: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+1
| | | | | | Use gpio_direction_input prior to gpio_get_value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53evk: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+2
| | | | | | | | Use gpio_direction_input prior to gpio_get_value. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* mx53ard: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+2
| | | | | | Use gpio_direction_input prior to gpio_get_value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53loco: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+2
| | | | | | | | | Use gpio_direction_input prior to gpio_get_value. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <r64343@freescale.com>
* mx6q: mx6qsabrelite: Provide default serial flash bus and chip-selectEric Nelson2012-02-27-1/+1
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platformEric Nelson2012-02-27-1/+26
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* mx28evk: add SPI supportMatthias Fuchs2012-02-27-0/+8
| | | | | | | | | | | | | This patch adds SPI support for the MX28EVK. Support for an optionally installed SPI flash is also added. An example configuration for redundant envrionment from SPI flash is also added but disabled by default. This patch has been tested on a MX28EVK Rev. D with an installed SST25VF032B 32Mbit SPI flash. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx28evk: add USB supportMatthias Fuchs2012-02-27-0/+7
| | | | | | | This patch enables USB host support on the MX28EVK board. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx6: mx6qarm2: updated board_mmc_getcd() to the new prototypeStefano Babic2012-02-12-4/+5
| | | | | | | | | | | | Commit 314284b1567f1ce29c19060641e7f213146f7ab8 has changed board_mmc_getcd() function prototype, while mx6qarm2 has still the old one. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* i.mx6q: mx6qsabrelite: Add the ethernet function supportJason Liu2012-02-12-0/+108
| | | | | | | Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Miao <eric.miao@linaro.org> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de>
* i.mx6q: mx6qsabrelite: Setup uart1 pinmuxTroy Kisky2012-02-12-0/+6
| | | | | | | | | | | This allows the Linux kernel to use UART1 before pinmux support is added for UART1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION optionFabio Estevam2012-02-12-1/+1
| | | | | | | | | | | | | | | | | | | Since commit 97039ab98 (env_mmc: Allow board code to override the environment address) mmc_get_env_addr is a weak-aliased function in common/env_mmc.c The mmc_get_env_addr implementation that exists at board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards, but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined. Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate this config option on their board file. This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite boardJason Liu2012-01-16-0/+363
| | | | | | | | Add the initial support for Freescale i.MX6Q Sabre Lite board Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Eric Nelson <eric.nelson@boundarydevices.com>
* mx28evk: Remove 'all' target from MakefileFabio Estevam2012-01-16-2/+0
| | | | | | | Remove 'all' target from Makefile, as this is unused code. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* mx28evk: Add initial support for MX28EVK boardFabio Estevam2012-01-16-0/+370
| | | | | | | | | | | Add initial support for Freescale MX28EVK board. Tested boot via SD card and by loading a kernel via TFTP through the FEC interface. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx6q: mx6qarm2: Enable the usboh3 clockEric Nelson2012-01-16-1/+1
| | | | | | | | | Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this clock is necessary for the USB download. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> CC: Jason Hui <jason.hui@linaro.org> Acked-by: Jason Hui <jason.hui@linaro.org>
* i.mx6q: arm2: Add the enet function supportJason Liu2012-01-16-0/+90
| | | | | | | | | This enable the network function on the i.mx6q armadillo2 board(arm2), thus we can use tftp to load image from network. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-01-13-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
| * MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBCPaul Gortmaker2012-01-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards were meaning to deploy this value: #define LCRR_DBYP 0x80000000 but were missing a zero, and hence toggling a bit that lands in an area marked as reserved in the 8548 reference manual. According to the documentation, LCRR_DBYP should be used as: PLL bypass. This bit should be set when using low bus clock frequencies if the PLL is unable to lock. When in PLL bypass mode, incoming data is captured in the middle of the bus clock cycle. It is recommended that PLL bypass mode be used at frequencies of 83 MHz or less. So the impact would most likely be undefined behaviour for LBC peripherals on boards that were running below 83MHz LBC. Looking at the actual u-boot code, the missing DBYP bit was meant to be deployed as follows: Between 66 and 133, the DLL is enabled with an override workaround. In the future, we'll convert all boards to use the symbolic DBYP constant to avoid these "count the zeros" problems, but for now, just fix the impacted boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2012-01-13-0/+15
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: mpc8313erdb: fix mtdparts address powerpc/83xx/km: add support for 8321 based tuge1 board powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1 powerpc/83xx/km: remove obsolete defines for tuda1 powerpc/83xx/km: update SDRAM parameters for km8321 boards mpc8313erdb: Enable GPIO support on the MPC8313E RDB mpc83xx: Add a GPIO driver for the MPC83XX family gpio: Replace ARM gpio.h with the common API in include/asm-generic gpio: Modify common gpio.h to more closely match Linux
| * | mpc8313erdb: Enable GPIO support on the MPC8313E RDBJoe Hershberger2012-01-09-0/+15
| |/ | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | mmc: Change board_mmc_getcd() function prototype.Thierry Reding2012-01-08-20/+22
|/ | | | | | | | | | | | | | | | | | | | | The new API no longer uses the extra cd parameter that was used to store the card presence state. Instead, this information is returned via the function's return value. board_mmc_getcd() returns -1 to indicate that no card-detection mechanism is implemented; 0 indicates that no card is present and 1 is returned if it was detected that a card is present. The rationale for this change can be found in the following email thread: http://lists.denx.de/pipermail/u-boot/2011-November/110180.html In summary, the old API was not consistent with the rest of the MMC API which always passes a struct mmc as the first parameter. Furthermore the cd parameter was used to mean "card absence" in some implementations and "card presence" in others. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* Fix building for mx51evk boardAnatolij Gustschin2011-12-19-2/+4
| | | | | | | | | | | | | Fix: mx51evk.c:206:6: error: conflicting types for 'board_ehci_hcd_init' /u-boot/include/usb/ehci-fsl.h:254:5: note: previous declaration of 'board_ehci_hcd_init' was here We also fix board_ehci_hcd_init() for mx53loco board. Building for mx53loco worked since <usb/ehci-fsl.h> is not included here. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* USB: mx51evk: add end enable USB host support on port 1Wolfgang Grandegger2011-12-11-0/+62
| | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>
* USB: mx53loco: add end enable USB host support on port 1Wolfgang Grandegger2011-12-11-0/+10
| | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com>
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