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* NAND boot: MPC8536DS supportMingkai Hu2009-09-30-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8536E can support booting from NAND flash which uses the image u-boot-nand.bin. This image contains two parts: a 4K NAND loader and a main U-Boot image. The former is appended to the latter to produce u-boot-nand.bin. The 4K NAND loader includes the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. The main U-Boot image just like a general U-Boot image except the parts that included by CONFIG_SYS_RAMBOOT. When power on, eLBC will automatically load from bank 0 the 4K NAND loader into the FCM buffer RAM where CPU can execute the boot code directly. In the first stage, the NAND loader copies itself to RAM or L2SRAM to free up the FCM buffer RAM, then loads the main image from NAND flash to RAM or L2SRAM and boot from it. This patch implements the NAND loader to load the main image into L2SRAM, so the main image can configure the RAM by using SPD EEPROM. In the first stage, the NAND loader copies itself to the second to last 4K address space, and uses the last 4K address space as the initial RAM for stack. Obviously, the size of L2SRAM shouldn't be less than the size of the image used. If so, the workaround is to generate another image that includes the code to configure the RAM by SPD and load it to L2SRAM first, then relocate the main image to RAM to boot up. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]Wolfgang Denk2009-09-25-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add Elpida Memory Configuration to mpc5121ads BoardsMartha M Stan2009-09-25-2/+97
| | | | | | | | Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc512x: Streamlined fixed_sdram() init sequence.Martha M Stan2009-09-25-1/+1
| | | | | | | | | | | | | | | | | | | Signed-off-by: Martha M Stan <mmarx@silicontkx.com> Minor cleanup: Re-ordered default_mddrc_config[] to have matching indices. This allows to use the same index "N" for source and target fields; before, we had code like this out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]); which always looked like a copy & paste error because 2 != 3. Also, use NULL when meaning a null pointer. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc8610hpcd: Use common 86xx fdt fixup codePeter Tyser2009-09-24-13/+1
| | | | | | | | Using the common 86xx fdt fixups removes some board-specific code and should make the mpc8610hpcd easier to maintain in the long run. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal2009-09-24-5/+24
| | | | | | | | | | | | | The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010 where max DDR data width supported is 64bit. As a next step the DDR data width initialization would be made more dynamic with more flexibility from the board perspective and user choice. Going forward we would also remove the hardcodings for platforms with onboard memories and try to use the FSL SPD code for DDR initialization. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Clean up use of LAWAR definesKumar Gala2009-09-24-16/+16
| | | | | | | | | On 85xx platforms we shouldn't be using any LAWAR_* defines but using the LAW_* ones provided by fsl-law.h. Rename any such uses and limit the LAWAR_ to the 83xx platform as the only user so we will get compile errors in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Clean up mpc8572DS PCI setup codeKumar Gala2009-09-24-157/+73
| | | | | | | Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Clean up p2020ds PCI setup codeKumar Gala2009-09-24-117/+33
| | | | | | | Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Clean up p1_p2_rdb PCI setupKumar Gala2009-09-24-20/+22
| | | | | | | | General code cleanup to use in/out IO accessors as well as making the code that prints out info sane between board and generic fsl pci code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* NAND boot: change NAND loader's relocate SP to CONFIG paramMingkai Hu2009-09-15-1/+1
| | | | | | | | | | So that we can set the NAND loader's relocate stack pointer to the value other than the relocate address + 0x10000. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link addressKumar Gala2009-09-09-0/+8
| | | | | | | | | | Some board ports place TEXT_BASE at a location that would cause the RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link. By default we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't explicitly set it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-57/+44
| | | | | | | | | | | Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-5/+0
| | | | | | | | The ddr_pd_cntl isn't defined in any reference manual and thus we wil remove especially since we set it to 0, which would most likely be its POR value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: sys_eeprom: Fix 'may be used uninitialized' warningAnton Vorontsov2009-09-08-1/+2
| | | | | | | | The warning is bogus, so silence it by initializing the 'ret' variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: simplify the "mac id" command, improve boot-time informational messageTimur Tabi2009-08-28-32/+49
| | | | | | | | | | | | | | | | | | | | | | | | | The "mac id" command took a 4-character parameter as the identifier string. However, for any given board, only one kind of identifier is acceptable, so it makes no sense to ask the user to type it in. Instead, if the user enters "mac id", the identifier (and also the version, if it's NXID) will automatically be set to the correct value. Improve the message that is displayed when EEPROM is read during boot. It now displays "EEPROM:" and then either an error message or the EEPROM identifier if successful. If the identifier in EEPROM is valid, then always reject a bad CRC, even if the CRC field has not been initialized. Don't force the MAC address count to MAX_NUM_PORTS or less. Forcing the value to be changed resulting in an in-memory copy that does not match what's in hardware, even though the user did not request that change. Finally, always update the CRC value in the in-memory copy after any field is changed, so that the CRC is always correct. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added PCIe support for P1 P2 RDBPoonam Aggrwal2009-08-28-1/+119
| | | | | | | Call fsl_pci_init_port() to initialize all the PCIe ports on the board. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Init pci ethernet cards if we enable any on MPC8572DSKumar Gala2009-08-28-1/+2
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Move to a common linker scriptKumar Gala2009-08-28-1722/+0
| | | | | | | | There are really no differences between all the 85xx linker scripts so we can just move to a single common one. Board code is still able to override the common one if need be. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-0/+809
| | | | | | | | | | | | | The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala2009-08-28-6/+0
| | | | | | | | | | | | For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 However these are all captured in the config.h and thus redudant. Also moved common 86xx flags into cpu/mpc86xx/config.mk. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala2009-08-28-43/+0
| | | | | | | | | | | | | For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 However these are all captured in the config.h and thus redudant. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Cleanup whitespace in mpc8536ds.cKumar Gala2009-08-28-11/+5
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala2009-08-28-73/+0
| | | | | | | | Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala2009-08-28-59/+24
| | | | | | | | Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Convert CS8900 Ethernet driver to CONFIG_NET_MULTI APIBen Warren2009-08-25-0/+12
| | | | | | | | | | | | | | | All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900 - changed CS8900_BASE to CONFIG_CS8900_BASE - changed CS8900_BUS?? to CONFIG_CS8900_BUS?? - cleaned up line lengths - modified VCMA9 command function that accesses the device - removed MAC address initialization from lib_arm/board.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'next' of git://git.denx.de/u-boot-coldfireWolfgang Denk2009-08-04-3/+311
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| * ColdFire: Add M5208EVB and MCF520x CPU supportTsiChung Liew2009-07-14-0/+305
| | | | | | | | Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
| * ColdFire: Update for M54451EVBTsiChung Liew2009-07-14-3/+6
| | | | | | | | | | | | | | | | Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
* | Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-6/+6
| | | | | | | | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* | Convert SMC911X Ethernet driver to CONFIG_NET_MULTI APIBen Warren2009-07-22-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X* - cleaned up line lengths - modified all boards that override weak function in this driver - added Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Tested-by: Mike Frysinger <vapier@gentoo.org>
* | 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boardsKumar Gala2009-07-22-86/+122
| | | | | | | | | | | | | | The pixis code used in8/out8 all over the place. Replace it with in_8/out_8 macros. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fieldsPeter Tyser2009-07-22-5/+5
| | | | | | | | | | | | | | | | Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Report which "bank" of NOR flash we are booting from on FSL boardsKumar Gala2009-07-22-14/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of swizzling the upper address bits of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 86xx: Report which "bank" of NOR flash we are booting from on MPC8641HPCNKumar Gala2009-07-22-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC8641HPCN board is capable of swizzling the upper address bit of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCIKim Phillips2009-07-18-740/+231
| | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | stdio/device: rework function naming conventionJean-Christophe PLAGNIOL-VILLARD2009-07-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far the console API uses the following naming convention: ======Extract====== typedef struct device_t; int device_register (device_t * dev); int devices_init (void); int device_deregister(char *devname); struct list_head* device_get_list(void); device_t* device_get_by_name(char* name); device_t* device_clone(device_t *dev); ======= which is too generic and confusing. Instead of using device_XX and device_t we change this into stdio_XX and stdio_dev This will also allow to add later a generic device mechanism in order to have support for multiple devices and driver instances. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variableAnton Vorontsov2009-07-16-2/+1
| | | | | | | | | | | | | | | | Since we have simple hwconfig interface now, we don't need pci_external_arbiter variable any longer. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc83xx: MPC8315ERDB: Use hwconfig for board type selectionAnton Vorontsov2009-07-16-9/+5
| | | | | | | | | | | | | | This patch simply converts the board to the hwconfig infrastructure. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc83xx: MPC837XEMDS: Fixup eSDHC nodes in device treeAnton Vorontsov2009-07-16-13/+24
| | | | | | | | | | | | | | | | | | | | | | fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and also will fixup clock-frequency property. Plus, since DR USB and eSDHC are mutually exclusive, we should only configure the eSDHC if asked through hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc83xx: MPC837XERDB: Add support for FSL eSDHCAnton Vorontsov2009-07-16-0/+18
|/ | | | | | | | | | | | | | | | | | This patch adds support for eSDHC on MPC837XERDB boards. The WP switch doesn't seem to work on RDB boards though, the WP pin is always asserted (can see the pin state when it's in GPIO mode). FSL DR USB and FSL eSDHC are mutually exclusive because of pins multiplexing, so user should specify 'esdhc' or 'dr_usb' options in the hwconfig environment variable to choose between the devices. p.s. Now we're very close to a monitor len limit (196 bytes left using gcc-4.2.0), so also increase the monitor len by one sector (64 KB). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* MPC512x: factor out common codeWolfgang Denk2009-07-14-112/+6
| | | | | | | | | | | | | | Now that we have 3 boards for the MPC512x it turns out that they all use the very same fixed_sdram() code. This patch factors out this common code into cpu/mpc512x/fixed_sdram.c and adds a new header file, include/asm-ppc/mpc512x.h, with some macros, inline functions and prototype definitions specific to MPC512x systems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-07-0/+213
|\ | | | | | | | | | | | | Conflicts: drivers/spi/Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * MX31: Add NAND SPL boot support to i.MX31 PDK board.Magnus Lilja2009-07-06-0/+97
| | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * MX31: Add basic support for Freescale i.MX31 PDK board.Magnus Lilja2009-07-06-0/+116
| | | | | | | | | | | | | | | | | | | | | | Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board). This patch assumes that some other program performs the actual NAND boot. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Fabio Estevam <fabioestevam@yahoo.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | fsl: Fix compiler warnings from gcc-4.4 in sys_eeprom codeKumar Gala2009-07-03-2/+4
| | | | | | | | | | | | | | | | | | sys_eeprom.c: In function 'do_mac': sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules sys_eeprom.c: In function 'mac_read_from_eeprom': sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC referencesPeter Tyser2009-07-02-8/+8
| | | | | | | | | | | | | | | | | | | | Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures use Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Add pci e1000 Ethernet support for P2020 boardRoy Zang2009-06-30-1/+2
|/ | | | | Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Convert DM9000 driver for CONFIG_NET_MULTIRemy Bohmer2009-06-15-0/+9
| | | | | | | | | All drivers need to be converted to CONFIG_NET_MULTI. This patch converts the dm9000 driver. Signed-off-by: Thomas Smits <ts.smits@gmail.com> Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* fsl: Update the number of ethxaddr in reading system eepromHaiying Wang2009-06-12-5/+18
| | | | | | | | | We support up to 8 mac addresses in system eeprom, so we define the macro MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr according to mac_count. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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