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* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-07-08-35/+44
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (212 commits) ARM: cache: Move the cp15 CR register read before flushing the cache. ARM: introduce arch_early_init_r() PXA: Enable CONFIG_PREBOOT on zipitz2 ARM: mx28: Remove CONFIG_ARCH_CPU_INIT No need to define CONFIG_ARCH_CPU_INIT. add new board vl_ma2sc MTD: SPEAr SMI: Add write support for length < 4 bytes i2c: designware_i2c.c: Add support for the "i2c probe" command rtc/m41t62: Add support for M41T82 with HT (Halt Update) SPL: ARM: spear: Add SPL support for SPEAr600 platform Makefile: Add u-boot.spr build target (SPEAr) SPL: ARM: spear: Remove some objects from SPL build SPL: lib/Makefile: Add crc32.c to SPL build SPL: common/Makefile: Add image.c to SPL build arm: Don't use printf() in SPL builds GPIO: Add SPEAr GPIO driver net: Multiple updates/enhancements to designware.c cleanup/SPEAr: Define configuration flags more elegantly cleanup/SPEAr: Remove unnecessary parenthesis SPEAr: Correct SoC ID offset in misc configuration space SPEAr: explicitly select clk src for UART SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION SPEAr: Enable dcache for fast file transfer SPEAr: Enable autoneg for ethernet SPEAr: Enable udc and usb-console support only for usbtty configuration SPEAr: Enable usb device high speed support SPEAr: Initialize SNOR in early_board_init_f SPEAr: Change the default environment variables SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK) SPEAr: Add configuration options for spear3xx and spear6xx boards SPEAr: Add basic arch related support for SPEAr SoCs SPEAr: Add interface information in initialization SPEAr: Add macb driver support for spear310 and spear320 SPEAr: Configure network support for spear SoCs SPEAr: Place ethaddr write and read within CONFIG_CMD_NET SPEAr: Eliminate dependency on Xloader table SPEAr: Fix ARM relocation support st_smi: Fixed page size for Winbond W25Q128FV flash st_smi: Change timeout loop implementation st_smi: Fix bug in flash_print_info() st_smi: Change the flash probing method st_smi: Removed no needed dependency on ST_M25Pxx_ID st_smi: Fix smi read status st_smi: Move status register read before modifying ctrl register st_smi: Read status until timeout happens st_smi: Enhance the error handling st_smi: Change SMI timeout values st_smi: Return error in case TFF is not set st_smi: Add support for SPEAr SMI driver mtd/NAND: Remove obsolete SPEAr specific NAND drivers SPEAr: Configure FSMC driver for NAND interface mtd/NAND: Add FSMC driver support arm/km: remove calls to kw_gpio_* in board_early_init_f arm/km: add implementation for read_dip_switch arm/km: support the 2 PCIe fpga resets arm/km: skip FPGA config when already configured arm/km: redefine piggy 4 reg names to avoid conflicts arm/km: cleanup km_kirkwood boards arm/km: enable BOCO2 FPGA download support arm/km: remove portl2.h and use km_kirkwood instead arm/km: convert mgcoge3un target to km_kirkwood arm/km: add kmcoge5un board support arm/km: add kmnusa board support arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0 cm-t35: fix incorrect NAND_ECC layout selection ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls. ARM: OMAP4/5: Move USB pads to essential list. ARM: OMAP4/5: Move USB clocks to essential group. ARM: OMAP4/5: Move gpmc clocks to essential group. ARM: OMAP4+: Move external phy initialisations to arch specific place. omap4: Use a smaller M,N couple for IVA DPLL da850/omap-l138: Enable auto negotiation in RMII mode omap: am33xx: accomodate input clocks other than 24 Mhz omap: emif: fix bug in manufacturer code test omap: emif: deal with rams that return duplicate mr data on all byte lanes OMAP4+: Force DDR in self-refresh after warm reset OMAP4+: Handle sdram init after warm reset ARM: OMAP3+: Detect reset type arm: bugfix: Move vector table before jumping relocated code Kirkwood: Add support for Ka-Ro TK71 arm/km: use spi claim bus to switch between SPI and NAND arm/kirkwood: protect the ENV_SPI #defines ARM: don't probe PHY address for LaCie boards lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2 lacie_kw: fix SDRAM banks number for net2big_v2 Kirkwood: add lschlv2 and lsxhl board support net: add helper to generate random mac address net: use common rand()/srand() functions lib: add rand() function kwboot: boot kirkwood SoCs over a serial link kw_spi: add weak functions board_spi_claim/release_bus kw_spi: support spi_claim/release_bus functions kw_spi: backup and reset the MPP of the chosen CS pin kirkwood: fix calls to kirkwood_mpp_conf kirkwood: add save functionality kirkwood_mpp_conf function km_arm: use filesize for erase in update command arm/km: enable mii cmd arm/km: remove CONFIG_RESET_PHY_R arm/km: change maintainer for mgcoge3un arm/km: fix wrong comment in SDRAM config for mgcoge3un arm/km: use ARRAY_SIZE macro arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE arm/km: add piggy mac adress offset for mgcoge3un arm/km: add board type to boards.cfg AT91SAM9*: Change kernel address in dataflash to match u-boot's size ATMEL/PIO: Enable new feature of PIO on Atmel device ehci-atmel: fix compiler warning AT91: at91sam9m10g45ek : Enable EHCI instead OHCI Atmel : usb : add EHCI driver for Atmel SoC Fix: AT91SAM9263 nor flash usage Fix: broken boot message at serial line on AT91SAM9263-EK board i.MX6 USDHC: Use the ESDHC clock mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register i.MX28: Add function to adjust memory parameters mx28evk: Fix PSWITCH key position mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove unused CONFIG_MII_GASKET mx6: Avoid writing to read-only bits in imximage.cfg m28evk: use same notation to alloc the 128kB stack ... Signed-off-by: Wolfgang Denk <wd@denx.de>
| * mx28evk: Fix boot by adjusting HW_DRAM_CTL29 registerFabio Estevam2012-07-07-0/+14
| | | | | | | | | | | | | | | | | | | | | | commit acc4959fc1 (Revert "i.MX28: Enable additional DRAM address bits") broke mx28evk boot. Fix it by properly adjusting the HW_DRAM_CTL29 register value. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * mx6: Avoid writing to read-only bits in imximage.cfgVikram Narayanan2012-07-07-2/+2
| | | | | | | | | | If in case this is valid according to the latest datasheet, ignore this patch. Acked-by: Marek Vasut <marex@denx.de>
| * mx6qsabrelite: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| * mx6qarm2: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| * mx51evk: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53smd: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53ard: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53evk: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53loco: Remove unused SOBJSFabio Estevam2012-07-07-4/+3
| | | | | | | | | | | | | | | | There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * mx53loco: Fix revision of Dialog boardsFabio Estevam2012-07-07-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | Original code was assuming that the fuse revision version for all mx53loco boards based on Dialog PMIC was the same, which is not the case. Force the revision of all Dialog-based boards to 0. This fixes a kernel crash when PMIC is accessed in the 2.6.35 kernel for Dialog rev E boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()York Sun2012-07-06-9/+7
| | | | | | | | | | | | | | | | We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER(). This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with encryption. Remove all _E entries from SVR list and CPU list. Signed-off-by: York Sun <yorksun@freescale.com>
* | powerpc/85xx: fdt_set_phy_handle() should return an error codeTimur Tabi2012-07-06-18/+20
| | | | | | | | | | | | | | fdt_set_phy_handle() makes several FDT calls that could fail, so it should not be hiding these errors. Signed-off-by: Timur Tabi <timur@freescale.com>
* | powerpc/p1010rdb: add readme document for p1010rdbShengzhou Liu2012-07-06-0/+212
| | | | | | | | Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* | powerpc/p1010rdb: update mux config of p1010rdb boardShengzhou Liu2012-07-06-12/+44
| | | | | | | | | | | | | | | | | | On p1010rdb some signals are muxed for tdm/can/uart/flash. If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly, defaultly we keep spi chip selection to spi-flash instead of to tdm/slic and disable uart1 when not using flexcan, as well disable sdhc. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* | powerpc/mpc85xx:Add BSC9131 RDB SupportPrabhakar Kushwaha2012-07-06-0/+558
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements BSC9131RDB Overview ----------------- -1Gbyte DDR3 (on board DDR) -128Mbyte 2K page size NAND Flash -256 Kbit M24256 I2C EEPROM -128 Mbit SPI Flash memory -USB-ULPI -eTSEC1: Connected to RGMII PHY -eTSEC2: Connected to RGMII PHY -DUART interface: supports one UARTs up to 115200 bps for console display Apart from the above it also consists various peripherals to support DSP functionalities. This patch adds support for mainly Power side functionalities and peripherals Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | powerpc/85xx: Add USB device-tree fixup for various platformsramneek mehresh2012-07-06-7/+33
|/ | | | | | | Add USB device-tree fixup for following platforms: MPC8536DS, P1022DS, P1023RDS, P2020COME, P2020DS, P2041RDB, P3060QDS Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* mx53loco: Add LCD supportFabio Estevam2012-05-25-0/+72
| | | | | | | | | | | | Add support for CLAA07LC0ACW LCD that connects to the mx53loco board. Configure the board to show the Linux logo on the LCD. Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account the framebuffer usage. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* mx5: Rename mx51_fb_init()Fabio Estevam2012-05-25-1/+1
| | | | | | | | | | The ipuv3 driver is currently only used on mx51, but it can be extended to work on mx53 and mx6 as well. Rename mx51_fb_init(), so that it can be used by other SoCs. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* mx51evk: Add LCD supportFabio Estevam2012-05-25-0/+59
| | | | | | | | | | | | Add support for CLAA07LC0ACW LCD that connects to the mx51evk board. Configure the board to show the Linux logo on the LCD. Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account the framebuffer usage. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx53loco: Remove unneeded gpio_set_value()Fabio Estevam2012-05-15-3/+2
| | | | | | | | | | There is no need to set the VBUS power enable to 0 first and then to 1. Set it to 1 in the gpio_direction_output() function. While at it, use the standard naming convention for the GPIO comment. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53loco: Add CONFIG_REVISION_TAGFabio Estevam2012-05-15-0/+12
| | | | | | | | | | | FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information. The kernel uses this data to distinguish between Dialog versus mc34708 based boards, and also to distinguish between revA and revB of the mc34708 based boards. Suggested-by: Yu Li <yk@magniel.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx53loco: Turn on VUSB regulatorFabio Estevam2012-05-15-0/+9
| | | | | | | | | | | | | | | | | | On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB regulator so that the mx53 USBH1 PHY receives the 3.3V voltage. Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then issued the commands: usb start usb info ,which correctly detected and printed the USB pen drive information. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx53loco: Add mc34708 support and set mx53 frequency at 1GHzFabio Estevam2012-05-15-12/+36
| | | | | | | | Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* pmic: dialog: Avoid name conflictsFabio Estevam2012-05-15-1/+1
| | | | | | | | | | As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC, we need to be able to build both drivers. Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6: mx6q_sabrelite: add SATA bindingsEric Nelson2012-05-15-0/+31
| | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: stefano Babic <sbabic@denx.de>
* mx28evk: add NAND supportLauri Hintsala2012-05-15-0/+21
| | | | | | | | NAND support is not enabled by default because Eval Kit is not delivered with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config. Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Acked-by: Marek Vasut <marex@denx.de>
* mx53loco: Add support for 1GHz operation for DA9053-based boardsFabio Estevam2012-05-15-0/+71
| | | | | | | | | | | | | | | There are two types of mx53loco boards: initial boards were built with a Dialog DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC. Add DA9053 PMIC support and adjust the required voltages and clocks for running the CPU at 1GHz. Tested on both versions of mx53loco boards. In the case of a MC34708-based board the CPU operating voltage remains at 800MHz. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by : Stefano Babic <sbabic@denx.de>
* mx53loco: Allow to print CPU information at a later stageFabio Estevam2012-05-15-0/+22
| | | | | | | | | | | Print CPU information within board_late_init(). This is in preparation for adding 1GHz support, which requires programming a PMIC via I2C. As I2C is only available after relocation, print the CPU information later at board_late_init(), so that the CPU frequency can be printed correctly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flowEric Nelson2012-05-15-2/+120
| | | | | | | | | Uses the 'magic_keys' idiom as described in doc/README.kbd: http://lists.denx.de/pipermail/u-boot/2012-April/122502.html Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6qsabrelite: No need to set the direction for GPIO3_23 againFabio Estevam2012-05-15-1/+1
| | | | | | | | | | There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is already established. Use gpio_set_value() for changing the GPIO output then. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* MX53: mx53loco: Add SATA supportStefano Babic2012-05-15-0/+3
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during bootTimur Tabi2012-04-24-52/+9
| | | | | | | | | | | | | | | | Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes displays which of these is actually built, but it's inconsistent. This is especially problematic since the "default" build for a given 85xx board can be either one, so if you don't see a message, you can't always know which size is being used. Not only that, but each board includes code that displays the message, so there is duplication. The 'bdinfo' command has been updated to display this information, so we don't need to display it at boot time. The board-specific code is deleted. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/corenet_ds: Slave uploads ucode when boot from SRIOLiu Gang2012-04-24-0/+14
| | | | | | | | | | | | | | | | | When boot from SRIO, slave's ucode can be stored in master's memory space, then slave can fetch the ucode image through SRIO interface. For the corenet platform, ucode is for Fman. Master needs to: 1. Put the slave's ucode image into it's own memory space. 2. Set an inbound SRIO window covered slave's ucode stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* powerpc/corenet_ds: Slave module for boot from SRIOLiu Gang2012-04-24-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. 5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode locally. For the slave module, need to finish these processes: 1. Set the boot location to SRIO1 or SRIO2 by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot. 4. Slave's u-boot image should be generated specifically by make xxxx_SRIOBOOT_SLAVE_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boardsYork Sun2012-04-24-5/+5
| | | | | | | | | P1010RDB and p1_pc_rdb_pc has incorrect configuration for CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING. Incorrect setting causes DDR failure in case of SPD absent. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1023rds: Disable nor flash node and enable nand flash nodeChunhe Lan2012-04-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the p1023rds, when system boots from nor flash, kernel only accesses nor flash and can not access nand flash with BR0/OR0; when system boots from nand flash, kernel only accesses nand flash and can not access nor flash with BR0/OR0. Default device tree nor and nand node should have the following structure: Example: nor_flash: nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x02000000>; bank-width = <2>; device-width = <1>; status = "okay"; partition@0 { label = "ramdisk"; reg = <0x00000000 0x01c00000>; }; } nand_flash: nand@1,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p1023-fcm-nand", "fsl,elbc-fcm-nand"; reg = <0x2 0x0 0x00040000>; status = "disabled"; u-boot-nand@0 { /* This location must not be altered */ /* 1MB for u-boot Bootloader Image */ reg = <0x0 0x00100000>; read-only; }; } When booting from nor flash, the status of nor node is enabled and the status of nand node is disabled in the default dts file, so do not do anything. But, when booting from nand flash, need to do some operations: o Disable the NOR node by setting status = "disabled"; o Enable the NAND node by setting status = "okay"; Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* i.MX6: arm2: Add AXI cache and Qos settingDirk Behme2012-04-17-0/+6
| | | | | | | | | | | | | | | Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Chen <b02280@freescale.com> CC: Jason Liu <r64343@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <festevam@gmail.com> Acked-by: Jason Liu <r64343@freescale.com>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-28/+28
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MX35: mx35pdk: wrong board revisionStefano Babic2012-04-16-11/+0
| | | | | | | | | | | | | | | | | | | The board revision is detected accessing to the pmic, that is not available before relocation (I2C). This generates the following error: CPU: Freescale i.MX35 rev 2.0 at 532 MHz. Reset cause: WDOG <reg num> = 7 is invalid. Should be less than 0 Board: MX35 PDK 1.0 The revision number is wrong, as a default value is printed (tested on a mx35pdk Rev. 2.0). Move the output in the board_late_init(), when pmic can be accessed. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: mx31pdk: drop enable_caches from board fileStefano Babic2012-04-16-8/+0
| | | | | | | | | enable_caches() is implemented now in cpu.c for ARM1136. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX53: DDR: Fix ZQHWCTRL field TZQ_CSTroy Kisky2012-04-16-4/+4
| | | | | | | | | Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x02 - 128 cycles. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53ard: Initialize return code with errorFabio Estevam2012-03-27-1/+1
| | | | | | | | | The variable "rc" is the return of board_eth_init() function. Initialize it with an error code, so that this function can return an error when CONFIG_SMC911X is not set. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAGEric Nelson2012-03-27-0/+5
| | | | | | | | | | | | | | This is needed to support Freescale-supplied userspaces. At the moment, both the IPU and VPU libraries provided by Freescale in the "imx-lib" package contain routines which scrape the system revision from /proc/cpuinfo. In the VPU library, this information is used to load the proper firmware, allowing a single binary to be used across various i.MX processors. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use ↵Eric Nelson2012-03-27-4/+4
| | | | | | for environment Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6qsabrelite: add and enable USB Host 1 supportWolfgang Grandegger2012-03-26-0/+18
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx6q: mx6qsabrelite: Update the network configurationTroy Kisky2012-02-27-33/+14
| | | | | | | | | | | | | | | | | | | Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* net: phy: make board_phy_config responsible for calling drv->configTroy Kisky2012-02-27-0/+4
| | | | | | | | | Boards may have things they want done before or after normal phy config. Letting the boards call drv->config allows them more flexibilty. Boards affected by this change are corenet_ds and mpc8544ds. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* mx35pdk: Remove duplicate CPU revision and reset cause informationFabio Estevam2012-02-27-26/+1
| | | | | | | MX35PDK board does not need to print CPU revision and reset cause in board file because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx51evk: Use gpio_direction_input prior to gpio_get_valueFabio Estevam2012-02-27-0/+2
| | | | | | Use gpio_direction_input prior to gpio_get_value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit v1.1 at 2024-11-09 08:39:34 +0000