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* fsl/board/ddr: optimize board-specific cpo for erratum A-009942Shengzhou Liu2016-12-15-0/+3
| | | | | | | | | | Optimize board-specific cpo for erratum A-009942 on b4860qds, ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb, t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb, t4qds, t4rdb boards. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc: T4240RDB: Remove macro CONFIG_T4240RDBYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_T4240RDB instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: T4160RDB: Separate from T4240RDB in KconfigYork Sun2016-11-23-1/+2
| | | | | | Use TARGET_T4160RDB to simplify Kconfig options. Signed-off-by: York Sun <york.sun@nxp.com>
* pbl: use "wait" command instead of "flush" commandZhao Qiang2016-10-14-2/+1
| | | | | | | | | | PBL flush command is restricted to CCSR memory space. So use WAIT PBI command to provide enough time for data to get flush in target memory. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [York Sun: rewrap commit message] Reviewed-by: York Sun <york.sun@nxp.com>
* Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.Zhao Qiang2016-10-14-1/+1
| | | | | | | | | | | | | T series boards use unified RCW for sd, spi and nand boot. Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg and txxx_nand_rcw.cfg for SPI/NAND/SD boot. And modify RCW[PBI_SRC] for them: PBI_SRC=5 for SPI 24-bit addressing PBI_SRC=6 for SD boot PBI_SRC=14 for IFC NAND boot Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* usb: fsl: Rename fdt_fixup_dr_usbSriram Dash2016-09-27-1/+1
| | | | | | | | The function fdt_fixup_dr_usb is specific to fsl/nxp. So, make the function name explicit and rename fdt_fixup_dr_usb into fsl_fdt_fixup_dr_usb. Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-04-7/+8
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| * freescale: Tweak various Makefiles to remove redundancy, fix aestheticsRobert P. J. Day2016-06-03-4/+5
| | | | | | | | | | | | | | | | No intended functional change, just remove redundancies in some Makefiles, and make whitespace aesthetics uniform. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com>
| * board/freescale: Use unified setup_ddr_tlbs for spl boot and non-spl bootShengzhou Liu2016-06-03-3/+2
| | | | | | | | | | | | | | | | We should use unified setup_ddr_tlbs() for spl boot and non-spl boot to make sure 'M' bit is set for DDR TLB to maintain cache coherence. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * powerpc/board: SPL: Enable malloc flag in global data.Sumit Garg2016-06-03-0/+1
| | | | | | | | | | | | | | | | For malloc to work in SPL framework enable GD_FLG_FULL_MALLOC_INIT flag in global data after allocating memory using mem_malloc_init. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | board/freescale: Update ddr clk_adjustShengzhou Liu2016-06-03-19/+19
|/ | | | | | | | | This patch updates clk_adjust to actual value for boards with T-series and LS-series SoCs to match the setting of clk_adjust in latest ddr driver. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc:t4240rdb: Disable the non-existent ethernet ports on T4240RDBYing Zhang2016-05-24-0/+5
| | | | | | | | | Disable the non-existent ethernet ports on T4240RDB:FM1_DTSEC5, FM1_DTSEC6, FM2_DTSEC5 and FM2_DTSEC6. Signed-off-by: Ying Zhang <ying.zhang22455@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/board/t4240rdb: Enable VID supportYing Zhang2016-01-25-0/+8
| | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seqPrabhakar Kushwaha2016-01-25-6/+0
| | | | | | | | | | | | Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+1
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: Move some header files to include/Shaohui Xie2015-10-29-1/+1
| | | | | | | | | | The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t4rdb: fix cpld reset altbankShaohui Xie2015-07-28-7/+1
| | | | | | | | cpld reset altbank should always reset to bank4 no matter what current bank is. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t4rdb: Add SD boot support for T4240RDB boardChunhe Lan2015-05-04-8/+117
| | | | | | | | | | | | This patch adds SD boot support for T4240RDB board. SPL framework is used. PBL initializes the internal RAM and copies SPL to it. Then SPL initializes DDR using SPD and copies u-boot from SD card to DDR, finally SPL transfers control to u-boot. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: Fix T4240RDB_SDCARD_defcofig] Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t4240rdb: Add alternate SerDes 2 protocol to align with RCWChunhe Lan2015-01-16-3/+3
| | | | | | | | | SerDes 2 protocol 56 is not valid any longer due to the new RCW; protocol 55 is used instead, so add SerDes 2 protocol 55 to align with RCW. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* fdt: Allow ft_board_setup() to report failureSimon Glass2014-11-21-1/+3
| | | | | | | | | | | | | | | | | | This function can fail if the device tree runs out of space. Rather than silently booting with an incomplete device tree, allow the failure to be detected. Unfortunately this involves changing a lot of places in the code. I have not changed behvaiour to return an error where one is not currently returned, to avoid unexpected breakage. Eventually it would be nice to allow boards to register functions to be called to update the device tree. This would avoid all the many functions to do this. However it's not clear yet if this should be done using driver model or with a linker list. This work is left for later. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* powerpc/t4rdb: Add support of CPLDChunhe Lan2014-11-14-0/+206
| | | | | | | | | | | This support of CPLD includes - Files and register definitions - Command to switch alternate bank - Command to switch default bank Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-3/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+7
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* powerpc/mpc85xx: Check return value of find_tlb_idxYork Sun2014-07-22-3/+9
| | | | | | | | | | find_tlb_idx() is called in board_early_init_r() on multiple boards. The return value is not checked before being used to disable a TLB. In normal case the return value wouldn't be -1. In case of a mis- configuration during porting to a new board, checking the return value may be helpful to reveal some user errors. Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/t4rdb: Add alternate serdes protocols to align with A-007186Chunhe Lan2014-06-05-3/+3
| | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. The protocols only using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. Alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-05-13-0/+697
T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
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