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If 36-bit is enabled, move INIT_RAM_ADDR physical address higher
to free lowest 4GB address space.
Signed-off-by: York Sun <yorksun@freescale.com>
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We already map the page cache-inhibited. There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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