| Commit message (Collapse) | Author | Age | Lines |
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Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
Signed-off-by: Ye.Li <B37916@freescale.com>
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According to the latest datasheet(Rev. C Draft 1, 10/2015) of
i.MX7D, change the VDD_SOC voltage to 0.95V in run mode, and
add a 25mV margin to cover the IR drop and board tolerance.
So setting VDD_SOC voltage to 0.975V.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Updated items:
memory set 0x307a0000 32 0x03040001 --> memory set 0x307a0000 32 0x01040001
This is just enable when LPDDR4 is enabled .
memory set 0x307a0064 32 0x0040005e --> memory set 0x307a0064 32 0x00400046
T_RFC_MIN this should be: RU(260ns*528Mhz)/2=69 (0x45)
memory set 0x307a00d0 32 0x00020001 --> memory set 0x307a00d0 32 0x00020083
PRE_CKE_X1024 be (500us*528Mhz/2)/1024 = 129, or 0x81
memory set 0x307a00d4 32 0x00010000 --> memory set 0x307a00d4 32 0x00690000
DRAM_RSTN_X1024 (200us*528Mhz)/1024=104, or 0x68
memory set 0x307a00e4 32 0x00090004 --> memory set 0x307a00e4 32 0x00100004
DEV_ZQINIT_X32 . Should be 16 clocks
memory set 0x307a0100 32 0x0908120a --> memory set 0x307a0100 32 0x09081109
T_FAW=(40ns*528Mhz)/2)=11
memory set 0x307a0104 32 0x0002020e --> memory set 0x307a0104 32 0x0007020d
tXPDLL=24ns*528Mhz=13clocks
File:
MX7D_EVK_DDR3_1GB_32bit.ds
Test result:
3 boards pass 2 days stress test.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Since setup_waveform_file in different boards code have same implementation,
move setup_waveform_file to board common code. Also rename it to
board_setup_waveform_file
This patch also fix a bug when using flush_cache. We should pass
'waveform_buf' to flush_cache, but not a string named 'addr'.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Datasheet Rev-B defines standby voltage as 1V for i.MX7D, we add
25mV for board level IR drop.
Signed-off-by: Anson Huang <b20788@freescale.com>
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To CD/VSELECT/RST, should use same pad settings with USDHC_PAD_CTRL,
because default NO_PAD_CTRL's settings is 100K Pull-Down. But, we need
pull-up for CD/VSELECT/RST.
Also some board provides external pull-down/up, we'd better use internal
pull-up for these pad settings.
To mx7d_12x12_lpddr3_arm2:
If no card plugged in, "mmc dev 1" will show "Card did not respond to
voltage select". After apply this patch, it will show "MMC: no card present".
To mx7dsabresd:
Alougth without this patch, if no card plugged in sd1, still correct msg
"MMC: no card present", anyway we'd better use pull-up.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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1. Replace the UDC driver with community's USB gadget d_dnl driver.
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Change the booti command to boota, due to the booti has been used for
ARM64 image boot.
5. Modify boota implementation to load ramdisk and fdt to their loading
addresses specified in boot.img header, while bootm won't do it for
android image.
6. Modify the android image HAB implementation. Authenticate the boot.img
on the "load_addr" for both SD and NAND.
7. Enable new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
with relevant header file "fsl_fastboot.h". While disabling the
configuration, the community fastboot is used.
8. Use community's way to combine cmdline in boot.img and u-boot environment,
not overwrite the cmdline in boot.img
Signed-off-by: Ye.Li <B37916@freescale.com>
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Abstracted the CSF size in imximage from a hardcoded value to a config
setting CONFIG_CSF_SIZE. This configuration is only enabled for secure
boot.
Increased the size of the CSF default allocation to 0x4000. This size
covers the event the worst case of 4906-bits keys.
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i2c_pad_info3's i2c index should 2, but not 1. Correct it.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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On MX7D, boot rom can provide some boot information such as boot device,
arm freq, axi freq, etc. (see the structure below)
Offset Byte4 | Byte3 | Byte2 | Byte1
0x0 Reserved | Boot Device Type | Boot Device Instance | Reserved
0x4 ARM core frequency(in Hz)
0x8 AXI bus frequency(in Hz)
0x0C DDR frequency(in Hz)
0x10 GPT1 input clock frequency(in Hz)
0x14 Reserved
0x18
0x1C
The boot information can be accessed by get the pointer at 0x1E8. This patch
changes the u-boot to use the new approach. When manufacture boot, the info
recorded is the actual SD port, not the failed device.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add support for HAB "Check data" all bits set and clear
check functionality. Rename CHECK_DATA to CHECK_BITS_SET.
Flag=0 -> (*address & mask) == 0 | All bits clear
Flag=2 -> (*address & mask) == mask | All bits set
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 0836912ef7a53d1f3d65f95556a34d03b8d65399)
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The mx7dsabresd uses new LCD TFT43AB which has 480 x 272 pixels.
Update panel info for this LCD.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit e77d667b20956a37de9d367a8914ef2fe79258df)
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To enable the EPDC feature:
1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings
in mx7dsabresd.h
2. cd <kernel_dir>/firmware/imx
3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin
4. cp epdc_splash.bin to [FAT partition on SD card]
Since the EPDC has pinmux conflicts with ENET and QSPI. These two
modules can't work at same time.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 8ba7f88f9efac9f90319b71644d3d1191f535d03)
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Should write the bits to SDI in reverse order because of the bits
will be shifted.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 83389e054d3cb7a905a3f81c20f395e784beb258)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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We should use CONFIG_FSL_QSPI, but not CONFIG_QSPI
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Upgrade to upstream way, using power_init_board.
Add pfuze300 support.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Update board codes to support GPMI NAND flash. Since the GPMI NAND needs
board rework, it is disabled at default. Two ways to enable GPMI NAND:
1. Define CONFIG_SYS_BOOT_NAND for NAND boot case
2. Modify the line 306 in mx7dsabresd.h from QSPI to NAND.
#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */
to
#define CONFIG_SYS_USE_NAND /* Enable the NAND flash at default */
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 5db03facf3add6a95728bc97ac2300003a103932)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Enable android fastboot, recovery, booti features for mx7d sabresd
board by using new build target: mx7devkandroid_config
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit bfc2b467ddac9c6eccb3f39aad3663a959546b64)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
boards.cfg
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Add i.MX7D SABRESD board BSP codes, with enabled modules:
UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX.
Build target: mx7dsabresd_config
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 3bf52a153e2964d4fdc17f0e8cb816686cbb6c2b)
Conflicts:
boards.cfg
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