| Commit message (Collapse) | Author | Age | Lines |
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On MX7D, boot rom can provide some boot information such as boot device,
arm freq, axi freq, etc. (see the structure below)
Offset Byte4 | Byte3 | Byte2 | Byte1
0x0 Reserved | Boot Device Type | Boot Device Instance | Reserved
0x4 ARM core frequency(in Hz)
0x8 AXI bus frequency(in Hz)
0x0C DDR frequency(in Hz)
0x10 GPT1 input clock frequency(in Hz)
0x14 Reserved
0x18
0x1C
The boot information can be accessed by get the pointer at 0x1E8. This patch
changes the u-boot to use the new approach. When manufacture boot, the info
recorded is the actual SD port, not the failed device.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Use pmic framework to simplify code and make code clean.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add support for HAB "Check data" all bits set and clear
check functionality. Rename CHECK_DATA to CHECK_BITS_SET.
Flag=0 -> (*address & mask) == 0 | All bits clear
Flag=2 -> (*address & mask) == mask | All bits set
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 0836912ef7a53d1f3d65f95556a34d03b8d65399)
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This commit 155fa9af95ac5be857a7327e7a968a296e60d4c8
"spi: mxc: fix sf probe when using mxc_spi"
introduces "board_spi_cs_gpio" function to discard gpio in
CONFIG_SF_DEFAULT_CS for spi flash.
Follow this rule to make imx boards work fine.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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We should use CONFIG_FSL_QSPI, but not CONFIG_QSPI
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The default u-boot reset is a internal WDOG reset (warm reset on i.MX6) which
does not have power and DDR reset. So the peripherals and DDR may meet problem.
When using the internal WDOG reset on i.MX7D ARM2 boards,
we meets two DDR issues:
1. On 12x12 ARM2, sometimes the system may hang in DCD because the DDRC Operating Mode
does not become to normal.
2. On 19x19 ARM2, the reset always brings system to USB download because the
DDR3 turns to unstable.
On the i.MX7D ARM2 board, the WDOG_B signal connects to POR_B or PMIC_PWRON. This gives
a chance to use a stronger reset. So in this patch, we set the IOMUX for WDOG_B pin and
enable WDOG_B signal output in WDOG WCR register.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 1192501c1fcf3b266eb22639a6bc93ac7c03b367)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add BSP codes, configuration head file and build target for
19x19 DDR3L ARM2 board with basic functions:
ENET2, I2C, SD/eMMC/MMC, USB, QSPI, ECSPI, pfuze3000 PMIC.
Build target: mx7d_19x19_ddr3_arm2_config
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 58fd869e3097b7461fbfae3d94e3ebbd30ae2474)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
boards.cfg
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