arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	MLK-11995 ARM: imx7: add i.mx7d TO1.1 support for LPSR mode	Anson Huang	2015-12-16	-6/+16
\| \| \| \| \| \| \| \|	i.MX7D TO1.1 changes DDR retension mode control to IOMUXC_GPR, add support to this change for LPSR which needs to exit from DDR retension mode. Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
*	MLK-11320 ARM: imx7d: disable wdog powerdown timer for LPSR	Anson Huang	2015-08-05	-0/+5
\| \| \| \| \| \| \| \|	In LPSR mode, wdog will be reset when resume, need to disable wdog powerdown timer to avoid system reset after timeout setting of 16 seconds. Signed-off-by: Anson Huang <b20788@freescale.com>
*	MLK-11281-1 ARM: imx7d: add lpsr resume support for imx7d	Anson Huang	2015-08-05	-0/+326
\| \| \| \| \| \| \| \| \| \| \| \|	For imx7d 12x12-lpddr3-arm2 board, when system enters LPSR mode and waked up, ARM core will be reset and uboot needs to be executed first, the LPSR register contains a resume entery, if this entry is non-zero, then it means it is a resume from LPSR mode, uboot plug in code needs to make DRAM exit from retention mode then jump to the entry directly, otherwise, it is a cold boot, normal boot process will be performed. Signed-off-by: Anson Huang <b20788@freescale.com>
*	MLK-11033 imx: mx7d: Update the lpddr3 script to 3.0.3 rev	Ye.Li	2015-06-04	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Update the DDR script for i.MX7D 12x12 LPDDR3 ARM2 board and i.MX7D 19x19 LPDDR3 ARM2 board to file "7D_lpddr3_0_3.ds5" Updated items: Changes DRAMTMG2 WR2RD from 7 to 8. Compass link for this script: http://compass.freescale.net/livelink/livelink?func=ll &objid=233861153&objAction=browse&sort=name Test results: Passed overnight test on two MX7D 12x12 LPDDR3 ARM2 board Passed overnight test on one MX7D 19x19 LPDDR3 ARM2 board Signed-off-by: Ye.Li <B37916@freescale.com>
*	MLK-10658 imx: mx7d 12x12 arm2: Update plugin codes to use latest DDR script	Ye.Li	2015-04-29	-23/+27
\| \| \| \| \| \| \| \| \| \|	The LPDDR3 intialization in plugin codes were missed to update in previous DDR script upgrading. So update the plugin codes to LPDDR3 script: 7D_lpddr3_0_2.ds5 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 1874cec3a70adde2ea911a9c155fb41c43ccab61)
*	MLK-10191-3 imx: mx7: Add support for i.MX7D 12x12 LPDDR3 ARM2 board	Ye.Li	2015-04-29	-0/+162
	Add BSP codes, configuration head file and build target for 12x12 LPDDR3 ARM2 board with basic functions: ENET, I2C, SD/eMMC/MMC, USB, LCD Splash screen, QSPI, ECSPI, pfuze3000 PMIC. Note: pmic and video is still not upstream way Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ac0d51ef07fdec880e6da318c08d521506640efa) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg