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enter retention
Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR
retention mode before uboot boot, so add this in DCD and plugin code. Meanwhile
correct the HW_ANADIG_SNVS_MISC_CTRL setting to avoid touching other bits.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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i.MX7D TO1.2 uses same DDR script as TO1.0,
TO1.1 uses dedicated DDR script.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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On i.MX7D TO1.1, design team adds a mux cell at the CKE path to fix the suspend
mode reset issue, but seems it add extra delay on CKE path, so CKE-CK timing violated.
When DDR enters self-refresh or retention for long time(> 15seconds per testing on some boards),
DDR data corruption occured, not able to decrease CKE delay, so we have to add extra
delay on all other signals to balance it.
DDR script needs to be fine-tuned according to this hardware change.
For DDR3, since the timing margin is not good, we have to decrease the DDR frequency from
533Mhz to 400Mhz.
Compass link:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235010235&objAction=browse&sort=name
Test:
Overnight tests passed on all changed boards.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Abstracted the CSF size in imximage from a hardcoded value to a config
setting CONFIG_CSF_SIZE. This configuration is only enabled for secure
boot.
Increased the size of the CSF default allocation to 0x4000. This size
covers the event the worst case of 4906-bits keys.
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Update the DDR script for i.MX7D 12x12 LPDDR3 ARM2 board and
i.MX7D 19x19 LPDDR3 ARM2 board to file "7D_lpddr3_0_3.ds5"
Updated items:
Changes DRAMTMG2 WR2RD from 7 to 8.
Compass link for this script:
http://compass.freescale.net/livelink/livelink?func=ll
&objid=233861153&objAction=browse&sort=name
Test results:
Passed overnight test on two MX7D 12x12 LPDDR3 ARM2 board
Passed overnight test on one MX7D 19x19 LPDDR3 ARM2 board
Signed-off-by: Ye.Li <B37916@freescale.com>
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[The compass link for this script]
http://compass.freescale.net/livelink/livelink?func=ll&objid=233861153
&objAction=browse&sort=name
[Changes in the script]
This script enable MDLL, but make it much more margin for the unlock state .
[DDR stress test result]
2 boards run the memtester for 3 days, and passed.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6fa6765b0dcdad8d414931e49edf6ba65a73d23a)
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[The compass link for this script]
http://compass.freescale.net/livelink/livelinkfunc=ll&objid=233861153
&objAction=browse&sort=name
[Changes in the script]
1. Change the DDR freq to 528Mhz.
2. Disable ddr phy dll, just force a dll output. IC suspects the dll
in ddr phy may unlock sometimes. The side-effect is we will lost the
ability to compensate the voltage/temperature change, so it may easy
to fail at H/L temperature.
[DDR stress test result]
3 boards involved the two days stress test by using memtester tool.
One board met a kernel oops after one day test. Other two pass the
two days test.
Compared to previous DDR script, the result is much positive.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 843c3c54af12cbf20e7bc912178e5a3628b78198)
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Add support for HAB "Check data" all bits set and clear
check functionality. Rename CHECK_DATA to CHECK_BITS_SET.
Flag=0 -> (*address & mask) == 0 | All bits clear
Flag=2 -> (*address & mask) == mask | All bits set
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 0836912ef7a53d1f3d65f95556a34d03b8d65399)
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* Update DCD table for lpddr3 @400Mhz
* Boot kernel linux and run memtester for memory stress
memtester 1G 100000
Signedoff-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
(cherry picked from commit 7cbab5830d486733a691be104cbc2be494b00776)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add BSP codes, configuration head file and build target for
12x12 LPDDR3 ARM2 board with basic functions:
ENET, I2C, SD/eMMC/MMC, USB, LCD Splash screen, QSPI, ECSPI,
pfuze3000 PMIC.
Note: pmic and video is still not upstream way
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ac0d51ef07fdec880e6da318c08d521506640efa)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
boards.cfg
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