| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
| |
MMDC auto power saving timer can NOT be too small,
as enter/exit auto self-refresh mode too frequently
may introduce too many latency for MMDC access,
set it to 0x10, same as previous value on i.MX6.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
|
|
|
|
|
| |
The lpddr2 memsize of mx6ul_9x9_evk is 256MB, not 512M, so
the CS0_END should be 0x47, but not 0x4F.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
The i.mx6ul 9x9 EVK shares the same base board with 6ul 14x14 EVK
with two main changes on CPU board:
1. Change to use pfuze 3000.
2. Use 256MB LPDDR2 memory.
This patch uses a macro CONFIG_6UL_9X9_LPDDR2 to distinguish the changes above,
basing on 14x14 EVK board level codes.
The new build target for the 9x9 EVK: mx6ul_9x9_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|