arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	i.MX6: consolidate pad names for multi-CPU boards	Eric Nelson	2013-03-07	-51/+51
\| \| \| \| \| \| \| \| \| \| \|	Rename all i.MX6 pad declarations to MX6_PAD_x, so a board may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo (MX6DL) by including the proper header. Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd only support MX6Q, so they include mx6q_pins.h. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
*	mx6qsabresd: add usdhc2 and usdhc4 support	Shawn Guo	2013-01-05	-6/+74
\| \| \| \| \| \| \| \| \| \| \| \| \|	The on-board number of available usdhc devices is something board specific. The patch moves CONFIG_SYS_FSL_USDHC_NUM out of mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd board. To keep the default mmc device for environment same as before (usdhc3), it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes it to 1 for mx6qsabresd. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
*	i.MX: declare iomux_v3_cfg_t arrays as const	Eric Nelson	2012-10-16	-3/+3
\| \| \| \|	Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
*	mxc: Fix SDHC multi-instance clock	Benoît Thébaudeau	2012-10-16	-0/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
*	mx6qsabresd: Add 8-bit USDHC support	Fabio Estevam	2012-10-15	-0/+4
\| \| \| \| \| \|	USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
*	mx6qsabresd: Add Ethernet support	Fabio Estevam	2012-10-15	-0/+76
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	mx6qsabresd has a AR8031 Gigabit PHY. Add support for it. Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail. Tested on 1Gbp and 100Mbps networks. Suggested-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
*	mx6: Add basic support for mx6qsabresd board.	Fabio Estevam	2012-10-15	-0/+159
	mx6qsabresd is a board based on mx6q SoC with the following features: - 1GB of DDR3 - 1 USB OTG port - 1 HDMI output port - SPI NOR - LVDS panel - Gigabit Ethernet - Camera Connector - eMMC and SD card slot - Audio Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>