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* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-28/+28
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAGEric Nelson2012-03-27-0/+5
| | | | | | | | | | | | | | This is needed to support Freescale-supplied userspaces. At the moment, both the IPU and VPU libraries provided by Freescale in the "imx-lib" package contain routines which scrape the system revision from /proc/cpuinfo. In the VPU library, this information is used to load the proper firmware, allowing a single binary to be used across various i.MX processors. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use ↵Eric Nelson2012-03-27-4/+4
| | | | | | for environment Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6qsabrelite: add and enable USB Host 1 supportWolfgang Grandegger2012-03-26-0/+18
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx6q: mx6qsabrelite: Update the network configurationTroy Kisky2012-02-27-33/+14
| | | | | | | | | | | | | | | | | | | Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* mx6q: mx6qsabrelite: Provide default serial flash bus and chip-selectEric Nelson2012-02-27-1/+1
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platformEric Nelson2012-02-27-1/+26
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* i.mx6q: mx6qsabrelite: Add the ethernet function supportJason Liu2012-02-12-0/+108
| | | | | | | Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Miao <eric.miao@linaro.org> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de>
* i.mx6q: mx6qsabrelite: Setup uart1 pinmuxTroy Kisky2012-02-12-0/+6
| | | | | | | | | | | This allows the Linux kernel to use UART1 before pinmux support is added for UART1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite boardJason Liu2012-01-16-0/+363
Add the initial support for Freescale i.MX6Q Sabre Lite board Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Eric Nelson <eric.nelson@boundarydevices.com>
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