| Commit message (Collapse) | Author | Age | Lines |
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Setup MMDC in two channel fixed mode
Initialize dram banks for two channel fixed mode
DRAM bank = 0x00000000
-> start = 0x10000000
-> size = 0x20000000
DRAM bank = 0x00000001
-> start = 0x80000000
-> size = 0x20000000
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
(cherry picked from commit bf1d8faf1dab7c4245ba7b79ceef6279cff45625)
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Set the ID pin pad to pull up not the pull down at default, otherwise
we can't enter the device mode, but always detect as host.
After this change we have to use portA cable to play as host,
and use portB cable for device.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit b315d6b36a913d75d25284320e69050ebdf7a7eb)
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Port LDO bypass support from v2015 to support the features:
1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
reboot whole board, so split these code to independent function so that board file
can call it freely.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
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Add the support for i.MX6DQ PoP lpddr2 ARM2 board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit e8777e91a239599ffd231ef56c60d49b68e5e3fc)
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Dynamic setting mmcdev and mmcroot for mx6qarm2.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 54ea563dbe1804e426afbbf0710ffa815551d92b)
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Implement board_mmc_get_env_dev for the boards.
Following is examples:
SD1/SD2/SD3: return devno;
SD2/SD3: return devno - 1;
SD2/SD4: if (devno == 2), return dev - 2; return dev - 1;
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
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Add pinmux settings and implement board_ehci_hcd_init
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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When an invalid USDHC port is passed we should return -EINVAL instead of 0.
Also, return the error immediately on fsl_esdhc_initialize() failure.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2
arm2 board. Since the LPDDR2 arm2 board has different DDR size, use
CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE.
Signed-off-by: Ye.Li <B37916@freescale.com>
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This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.
The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.
Signed-off-by: Ye.Li <B37916@freescale.com>
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.
All board files should include <asm/arch/mx6-pins.h>
with one of the following defined in boards.cfg
MX6Q - for boards targeting i.MX6Q or i.MX6D
MX6DL - for boards targeting i.MX6DL
MX6S - for boards targeting i.MX6S
MX6QDL - for boards that support any of the above with
run-time detection
Pad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
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PUE requires PKE to mean something, as do pull values with PUE, so do not
compell users to explicitly use PKE and PUE everywhere. This is also what is
done on Linux and what has already been done for i.MX51.
By the way, remove some unused pad control definitions.
There is no change of behavior.
Note that SPI_PAD_CTRL was defined by several boards with a pull value, but
without PKE or PUE, which means that no pull was actually enabled in the pad.
This might be a bug in those boards, but this patch does not change the
behavior, so it just removes the meaningless pull value from those definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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Rename all i.MX6 pad declarations to MX6_PAD_x, so a board
may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo
(MX6DL) by including the proper header.
Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd
only support MX6Q, so they include mx6q_pins.h.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
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The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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Commit 314284b1567f1ce29c19060641e7f213146f7ab8 has
changed board_mmc_getcd() function prototype, while
mx6qarm2 has still the old one.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
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This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
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Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.
There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
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