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* ENGR00210918-2 cleanup android support, build pass all boardsZhang Jiejing2012-05-29-40/+2
| | | | | | | | | | - move recovery.h to common inlcude place. - move supported_reco_envs to soc related, not board related, - user can change this via configure header, don't needs this in every board file. - pass build for all mx5/mx6 android configs. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163697 - FEC : Adjust MX53 Network stream throughput.Fugang Duan2011-12-20-0/+110
| | | | | | | | | | | | | | | | | | | | | - When the system is very busy(such as play 1080p streaming in local) the WIFI & FEC performance were very low. - Enable the patch in uboot for WIFI and FEC performance: If WIFI connect to PORT2, enable the config: CONFIG_ADJUST_WIFI_FEC_PERFORMANCE CONFIG_WIFI_SDHC_PORT2 If WIFI connect to port3, enable the config: CONFIG_ADJUST_WIFI_FEC_PERFORMANCE CONFIG_WIFI_SDHC_PORT3 - The solution of the patch: I. Changing M4IF dynamic jump value to zero, which can guarantee FEC the high rate of accessing bus. II. Increase Master 4 priority for FEC. Increase Master 2 and AHBMAX priority for WIFI. - Test result: i.MX53 FEC bandwidth (1080p streaming playback in local): 47.1 Mbits/sec. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00169655 pcba : merge i2c recovery patch to pcbaRobin Gong2011-12-09-0/+274
| | | | | | add i2c recovery function in board_lateinit,merge the patch of ENGR00163704 Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00169654 mx53_pcba: enable DDR auto-calibrationRobin Gong2011-12-07-178/+620
| | | | | | | Enabled the functioon of DDR auto-calibration in flash_header.S of HW PCBA. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00163239-2 mc34708: enable extra charging circuitRobby Cai2011-11-28-0/+11
| | | | | | | | | current schema is to enable this extra charging circuit, and then enable or disable it by checking VBatt is less or more than 3.4v. If VBatt is less than 3.4v, enable it; otherwise disable it. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00163239-1 mc34708: fix not charging issue in ubootRobby Cai2011-11-28-3/+13
| | | | | | there's some incorrect setting in spi mode, fixed in this patch. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00162437 uboot mc34708 pcba : add spi support on mc34708Robin Gong2011-11-17-8/+134
| | | | | | | | Rev C of pcba will connect mc34708 by spi default, so uboot should support it: 1. add spi support in mx53_pcba 2. move pmic voltage config from board_init to board_late_init 3. support both I2C and SPI on mc34708 in one image Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00155891 : Fix reboot stress test failed issueRobin Gong2011-11-16-95/+202
| | | | | | | | | | | | | | If we replace DCD mode with plug-in mode in u-boot , we found DDR not stable. We should enable "Force Measurement" after the delay line parameters is configured in the plug-in code, for example: 0x63fd9088 = 0x34333936 0x63fd9090 = 0x49434942 0x63fd90F8 = 0x00000800 "Force Measurement" update all of mx53 DDR script, include mx53_smd,mx53_loco,mx53_evk,mx53_ard, mx53_pcba, at the same time, mx53_pcba will change from DCD mode to plug-in mode in flash_header.S Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00161415: mc34708: set 1p5Robby Cai2011-11-04-2/+2
| | | | | | set charging current limit to 1p5 Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00155569 mc34708: change global reset time as 4s of LOCO and PCBARobin Gong2011-09-19-0/+11
| | | | | | reduce the time of global reset to 4s in the boards of loco and pcba Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00156389: turn off child clocks before reconfigure perclk_rootTerry Lv2011-09-13-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | In addition to ensuring that PERCLK remains at least 2.5 times slower than the AHB clock, certain steps need to be followed to ensure robust operation of PERCLK when reconfiguring the PERCLK clock source. To properly configure the PERCLK clock source, the following steps are required: 1.In the CCGR registers, gate the clocks to all PERCLK-dependent modules. 2.Select the desired input clock for the PERCLK root clock (to be either source from the peripherals main source clock or the lp_apm clock source). Refer to the CMCBR register, perclk_lp_apm_sel bit. 3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers to the desired setting. Refer to the CBCDR register for details. 4.In the CCGR registers, enable the desired clocks for the PERCLK-dependent module clocks. Certain steps are required to reconfigure perclk_root. If don't follow these steps, GPT timer may stop and the kernel stops at " "Calibrating delay loop". Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00155283: Set dpgdck0_2_en to 0 when freq is lower than 300MHzTerry Lv2011-09-01-1/+8
| | | | | | | | 1. Set dpgdck0_2_en to 0 when required freq is lower than 300Mhz. 2. When dpgdck0_2_en is 0, the formula to calculate output freq will be changed to 2 * freq * []. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00154666-2: Align u-boot mmc command with communityTerry Lv2011-09-01-1/+1
| | | | | | Trivial change to remove build warnings. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00155018 mx53_pcba: update Ripley AUX input to 950mA and charge currentWayne Zou2011-08-19-2/+3
| | | | | | | set Ripley AUX input current limit to 950mA and set charge termination current to 400mA Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00154762 mx53_pcba: update Ripley/mc34708 USB/AUX charger settingsWayne Zou2011-08-12-4/+13
| | | | | | update Ripley USB and AUX/DC charger settings for pcba revB board Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00154468 mx53 pcba: Add DC-IN power supply support for revB boardWayne Zou2011-08-08-1/+9
| | | | | | | | Add DC-IN power supply support for revB board when booting from EMMC. set both AUX&USB current limit to 1.5A for Ripley 2.1 only Change CC current to 950mA Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00154400 mx53 pcba: bringup update for RevB boardXinyu Chen2011-08-05-13/+16
| | | | | | | | | Update DDR DCD configuration Open all the clocks during boot Change CV voltage to 4.2V Signed-off-by: Weihua Zou <wayne.zou@freescale.com> Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00153526 mx53 pcba: add pcba board revB support in ubootXinyu Chen2011-07-27-0/+1156
Add new machine type for pcba. Add UART, I2C, SD/MMC, PMIC, DDR initial support. Add MFG tool support. Add support for MC34708 on revB pcba board. Update VDDGP setting on MC34708 PMIC for revB board. Close unused clock, for fastboot it will enable usb_phy usb_oh3 clock by itself, still need to verify this work or not when revB bootup. Signed-off-by: Wayne Zou <b36644@freescale.com> Signed-off-by: Lily Zhang <r58066@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
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