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* fsl_pci: Move prototypes into fsl_pci.h and remove explicit externsKumar Gala2009-04-04-6/+0
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.hKumar Gala2009-04-04-1/+1
| | | | | | | Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Cleanup MP supportKumar Gala2009-04-01-1/+1
| | | | | | | | | | | | | | * Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx * Introduce determine_mp_bootpg() helper. We'll need this to address a bug introduced in v2009.03 with 86xx MP booting. We have to make sure to reserve the region of memory used for the MP bootpg() so other u-boot code doesn't use it. * Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to allow cmd_mp.c to build and work. In the future we should look at implementing all these functions. This could be common w/85xx if we use spin tables on 86xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8641hpcn/sbc8641d: Add missing board_lmb_reservesBecky Bruce2009-03-31-0/+9
| | | | | | | | | | | | We're missing the board_lmb_reserve definitions that allow cpu_mp_lmb_reserve to be called; this means that Linux is free to reallocate reserved pages. Linux currently boots because we're getting lucky - the page we've reserved is high enough in memory that it isn't allocated by Linux while we still need it to be in existence. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* mpc8641hpcn: Indicate 36-bit addr map in boot messagesBecky Bruce2009-02-23-0/+3
| | | | | | | If 36-bit addressing is enabled, print a message on the console when we boot. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* 86xx: Reset updatePeter Tyser2009-02-16-0/+8
| | | | | | | | | | Update the 86xx reset sequence to try executing a board-specific reset function. If the board-specific reset is not implemented or does not succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard reset procedure than the previous method and allows all board peripherals to be reset if needed. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* mpc8641hpcn: Clean up PCI mapping conceptsBecky Bruce2009-02-10-5/+5
| | | | | | | | | Clean up PCI mapping concepts in the 8641 config - rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc8641hpcn: Set up outbound pci windows before inboundBecky Bruce2009-02-10-6/+6
| | | | | | | | | | Because the inbound pci windows are mapped generously, set up the more specific outbound windows first. This way, when we search the pci regions for something, we will hit on the more specific region. This can actually be a problem on systems with large amounts of RAM. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* fsl-ddr: use the 1T timing as default configurationDave Liu2009-01-23-0/+2
| | | | | | | | | For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-0/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc8641: fix address-cells default in old .dts detectionBecky Bruce2008-11-11-3/+3
| | | | | | | | address-cells defaults to 2, not 1; so in the unlikely event that it isn't specified, this patch is required for correct operation. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc8641: Try to detect old .dts filesBecky Bruce2008-11-10-0/+27
| | | | | | | | | | | | | Since we've changed the memory map of the board, be nice and add some checking to try to catch out-of-date .dts files. We do this by checking the CCSRBAR location in the .dts and comparing it to the CCSRBAR location in u-boot. If they don't match, a warning msg is printed. This isn't foolproof, but it's simple and will catch most of the cases where an out-of-date .dts is present, including all of the cases where a new u-boot is used with an old standard MPC8641 .dts file as supplied with Linux. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc8641: Support 36-bit physical addressingBecky Bruce2008-11-10-6/+7
| | | | | | | | | | | | | | | | | | This patch creates a memory map with all the devices in 36-bit physical space, in addition to the 32-bit map. The CCSR relocation is moved (again, sorry) to allow for the physical address to be 36 bits - this requires translation to be enabled. With 36-bit physical addressing enabled, we are no longer running with VA=PA translations. This means we have to distinguish between the two in the config file. The existing region name is used to indicate the virtual address, and a _PHYS variety is created to represent the physical address. Large physical addressing is not enabled by default. Set CONFIG_PHYS_64BIT in the config file to turn this on. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc8641: Change 32-bit memory mapBecky Bruce2008-11-10-11/+14
| | | | | | | | | | | | | | | | | | | | | | The memory map on the 8641hpcn is modified to look more like the 85xx boards; this is a step towards a more standardized layout going forward. As part of this change, we now relocate the flash. The regions for some of the mappings were far larger than they needed to be. I have reduced the mappings to match the actual sizes supported by the hardware. In addition I have removed the comments at the head of the BAT blocks in the config file, rather than updating them. These get horribly out of date, and it's a simple matter to look at the defines to see what they are set to since everything is right here in the same file. Documentation has been changed to reflect the new map, as this change is user visible, and affects the OS which runs post-uboot. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc8641: Drop imaginary second flash bank, map 8MBBecky Bruce2008-11-10-1/+1
| | | | | | | | | There's a lot of setup and foo for the second flash bank. The problem is, this board doesn't actually have one. Clean this up. Also, the flash is 8M in size. Get rid of the confusing aliased overmapping, and just map 8M. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Merge commit 'wd/master'Jon Loeliger2008-11-10-9/+9
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| * Coding Style cleanup, update CHANGELOGWolfgang Denk2008-11-02-9/+9
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | 86xx: Make dram_size a phys_size_tBecky Bruce2008-11-03-3/+3
| | | | | | | | | | | | It's currently a long and should be phys_size_t. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI buildBecky Bruce2008-11-03-8/+10
| | | | | | | | | | | | | | | | | | | | You can't actually have both, and with some coming changes to change the memory map for the board and support 36-bit physical, we need the extra BAT that is being consumed by having both. I also make non-PCI configs build cleanly, for the sake of sanity. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | mpc8641: Stop supporting non-PCI_PNP configsBecky Bruce2008-11-03-21/+1
|/ | | | | | | We don't actually ever do this, remove the code so we can stop maintaining it. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: remove the second DDR LAW setting for mpc8641hpcnDave Liu2008-10-30-3/+0
| | | | | | | | The DDR1 LAW will precedence the DDR2 LAW, so remove the second DDR LAW. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: remove the unused ddr_enable_ecc in the board fileDave Liu2008-10-30-11/+0
| | | | | | | | | The DDR controller of 86xx processors have the ECC data init feature, and the new DDR code is using the feature, we don't need the way with DMA to init memory again. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Kumar Gala <kumar.gala@freescale.com>
* 86xx: Convert all fsl_pci_init users to new APIsKumar Gala2008-10-24-36/+17
| | | | | | | | | | | | Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* Add DDR options setting on MPC8641HPCN boardHaiying Wang2008-10-18-36/+110
| | | | | | | | | | * Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-18-1/+4
| | | | | | | | | | | | | Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-51/+51
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Moved initialization of RTL8139 Ethernet controller to board_eth_init()Ben Warren2008-09-02-0/+8
| | | | | | | | | | | | | Affected boards: hidden_dragon MPC8544DS MPC8610HPCN R2DPLUS TB0229 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* FSL DDR: Convert MPC8641HPCN to new DDR code.Kumar Gala2008-08-27-7/+95
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix some more print() format errors.Wolfgang Denk2008-07-11-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge commit 'wd/master'Jon Loeliger2008-07-10-1/+1
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| * Cleanup out-or-tree building for some boards (.depend)Wolfgang Denk2008-07-02-1/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | MPC8641HPCN: Report board id, board version and fpga version.Kumar Gala2008-06-19-2/+4
|/ | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-12-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-06-11-9/+9
|\ | | | | | | | | | | | | | | Conflicts: include/asm-ppc/fsl_lbc.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 85xx/86xx: Move to dynamic mgmt of LAWsKumar Gala2008-06-11-9/+9
| | | | | | | | | | | | | | | | | | | | | | With the new LAW interface (set_next_law) we can move to letting the system allocate which LAWs are used for what purpose. This makes life a bit easier going forward with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
* | Merge commit 'wd/master'Jon Loeliger2008-06-06-4/+4
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| * Big white-space cleanup.Wolfgang Denk2008-05-21-4/+4
| | | | | | | | | | | | | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mpc86xx: Removed unused and unconfigured memory test code.Jon Loeliger2008-05-19-36/+0
|/ | | | | | Besides, other common code exists. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-29-1/+1
| | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Remove erroneous or extra spd.h #includers.Jon Loeliger2008-03-05-5/+1
| | | | | | | | | | Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Fix GUR PCI config registers properly.Jon Loeliger2008-02-20-2/+4
| | | | | | | | | | | | | | Back in commit 975a083a5ef785c414b35f9c5b8ae25b26b41524 where I tried to "8610HPCD: Fix typos in two PCI setup registers", I botched it due to not realizing that 8610 and 8641 had different Global Utility Register defintions, one of which was like 85xx, and the other wasn't. Correct this problem by introducing two symbols, one for each 86xx SoC, but neither of which is named anything like 85xx. My bad. Lovely Wednesday with git bisect. You know. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Convert sbc8641d to use libfdt.Jon Loeliger2008-02-18-15/+3
| | | | | | | | | | | | | | | This is the proper fix for a missing closing brace in the function ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com. The ft_cpu_setup() function in mpc8641hpcn.c should have been removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE, but was missed. Only, the sbc8641d was nominally still using it. It all got ripped out, and the funcality that was in ft_board_setup() was refactored to remove the CPU portions into the new file cpu/mpc86xx/fdt.c instead. Make sbc8641d use this now. Based loosely on an original patch from joe.hamman@embeddedspecialties.com Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Remove old-style law setup codeBecky Bruce2008-01-24-182/+0
| | | | | | This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: Support new law setup method and convert mpc8641Becky Bruce2008-01-24-1/+65
| | | | | | | | Adds the support code in cpu/mpc86xx for the new law setup code recently created fsl_law.c, and changes the MPC8641HPCN config to use this code. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk2008-01-12-1/+1
| | | | | | | | | | | | | | | | | | | With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Convert MPC8641HPCN to use libfdt.Jon Loeliger2008-01-03-26/+34
| | | | | | | | | Assumes the presence of the aliases node in the DTS to locate the ethernet, pci and serial nodes for fixups. Use consistent fdtaddr and fdtfile in environment variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* ft_board_setup update 85xx/86xx of pci/pcie bus-range property.Ed Swarthout2007-09-04-0/+16
| | | | | | pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* support board vendor-common makefilesKim Phillips2007-08-29-7/+1
| | | | | | | | | | | | | | | | | | if a board/$(VENDOR)/common/Makefile exists, build it. also add the first such case, board/freescale/common/Makefile, to handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as dictated by board configuration. thusly get rid of alternate build dir errors such as: FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory by putting the common/ mkdir command in its proper place (the common Makefile). Common bits from existing individual board Makefiles have been removed. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Move the MPC8641HPCN board under board/freescale.Jon Loeliger2007-08-15-0/+812
Minor path corrections needed to ensure buildability. Signed-off-by: Jon Loeliger <jdl@freescale.com>
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