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path: root/board/freescale/mpc8641hpcn/ddr.c
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* powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala2011-04-04-30/+0
* powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()Kumar Gala2011-04-04-6/+1
* fsl-ddr: use the 1T timing as default configurationDave Liu2009-01-23-0/+2
* Coding Style cleanup, update CHANGELOGWolfgang Denk2008-11-02-8/+8
* Add DDR options setting on MPC8641HPCN boardHaiying Wang2008-10-18-36/+110
* Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-18-1/+4
* FSL DDR: Convert MPC8641HPCN to new DDR code.Kumar Gala2008-08-27-0/+88