| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script. Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.
However, '*(.rodata*)' by itself will result in sub-optimal section
ordering. The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file. This is easy to fix by using the
SORT_BY_ALIGNMENT command.
This patch has not be tested one most of the boards modified. Some boards
have a linker script that looks something like this:
*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)
I change this to:
*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
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Update the 86xx reset sequence to try executing a board-specific reset
function. If the board-specific reset is not implemented or does not
succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard
reset procedure than the previous method and allows all board
peripherals to be reset if needed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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The diufb command usage formatting is non-standard. It was
made standard in preparation for larger command usage updates.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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It's currently a long and should be phys_size_t.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
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Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
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Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.
* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory. phys_size_t is defined as an unsigned long on almost
all current platforms.
This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram). It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.
Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Conflicts:
include/asm-ppc/fsl_lbc.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
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With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose. This makes life
a bit easier going forward with the new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
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The clock divider has different format in 5121 and 8610. This patch moves it to
board specific code.
Signed-off-by: York Sun <yorksun@freescale.com>
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Besides, other common code exists.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Make the flags use -Os like all other boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed. And CONFIG_ defines were added
to various board config files to make sure that happens.
The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.
Boards that are CDS specific were renamed with cds_ prefix.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Many of the spd.h #includers don't need it,
and wanted to have spd_sdram() declared instead.
Since they didn't get that, some also had open
coded extern declarations of it instead or as well.
Fix it all up by using spd_sdram.h where needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Back in commit 975a083a5ef785c414b35f9c5b8ae25b26b41524 where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't. Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.
My bad. Lovely Wednesday with git bisect. You know.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars. Fix this by removing the 85xx cruft from the
86xx codebase.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Convert the board/freescale/common/Makefile to use
CONFIG_* options to select which files to conditionally
compile into the board/freescale/common library rather
than conditionally compiling entire files.
Now handles::
CONFIG_FSL_PIXIS
CONFIG_FSL_DIU_FB
CONFIG_PQ_MDS_PIB
CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.
The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Assumes the presence of the aliases node in the DTS to
locate the pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Turn off DEBUG.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
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Add cfb console support to FSL 8610 DIU driver.
Inspect board version from PIXIS to obtain correct pixel format.
Use #define CONFIG_VIDEO in config file to enable fb console.
To switch monitor, set monitor variable to
0 - DVI, 1 - Single link LVDS, 2 - Double link LVDS
followed by "diufb init".
Preserve logo bitmap at the top of the fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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1280x1024 and 1024x768 @ 32 bpp are supported now.
DVI, Single-link LVDS, Double-link LVDS are all supported.
Environmental variable "monitor" is used to specify monitor port.
A new command "diufb" is introduced to reinitialize monitor
and display a BMP file in the memory. So far, 1-bit, 4-bit,
8-bit and 24-bit BMP formats are supported.
diufb init
- initialize the diu driver
Enable the port specified in the environmental variable "monitor"
diufb addr
- display bmp file in memory.
The bmp image should be no bigger than the resolution, 1280x1024
for DVI and double-link LVDS, 1024x768 for single-link LVDS.
Note, this driver allocate memory but doesn't free it after use
It is written on purpose -- to avoid a failure of reallocation
due to memory fragement.
ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon loeliger <jdl@freescale.com>
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Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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